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Tue, 30 Jun 2026 10:14:45 -0700 (PDT) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Tue, 30 Jun 2026 12:14:38 -0500 Message-Id: Cc: =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , , , Subject: Re: [PATCH v2 1/7] dt-bindings: iio: adc: Add TI ADS126x ADC family From: "Kurt Borja" To: "David Lechner" , "Kurt Borja" , "Jonathan Cameron" , "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" X-Mailer: aerc 0.21.0-0-g5549850facc2 References: <20260628-ads126x-v2-0-4b1b231325ba@gmail.com> <20260628-ads126x-v2-1-4b1b231325ba@gmail.com> <946a30c9-01e9-42f1-bd2b-b7934fda85cf@baylibre.com> <22e1e1c2-659c-4991-857c-b38d66769c7e@baylibre.com> In-Reply-To: <22e1e1c2-659c-4991-857c-b38d66769c7e@baylibre.com> On Mon Jun 29, 2026 at 11:43 AM -05, David Lechner wrote: > On 6/29/26 11:27 AM, Kurt Borja wrote: >> On Mon Jun 29, 2026 at 9:21 AM -05, David Lechner wrote: >>> On 6/28/26 2:12 PM, Kurt Borja wrote: >>>> On Sun Jun 28, 2026 at 10:45 AM -05, David Lechner wrote: >>>>> On 6/28/26 12:36 AM, Kurt Borja wrote: >>>>>> The ADS1262 and ADS1263 are 32-bit, 38.4-kSPS delta-sigma ADCs with = an >>>>>> integrated PGA, internal reference, excitation and burn-out current >>>>>> sources for sensor biasing and diagnostics. The ADS1263 adds a secon= d, >>>>>> 24-bit delta-sigma ADC (ADC2) for background measurements. >>>>>> >>> >>> ... >>> >>>>>> + >>>>>> +patternProperties: >>>>>> + "^channel@[0-9]+$": >>>>>> + $ref: /schemas/iio/adc/adc.yaml# >>>>>> + unevaluatedProperties: false >>>>>> + >>>>>> + properties: >>>>>> + reg: >>>>>> + maxItems: 1 >>>>>> + >>>>> >>>>> If we want to allow single-ended/pseudo-differential inputs, then we = should >>>>> also allow single-channel (positive pin) and common-mode-channel (neg= ative >>>>> pin) properties. >>>>> >>>>> This will also require additional common-mode--supply properties t= o allow >>>>> for the negative pin connected to something other than GND. >>>> >>>> Ah interesting. Why the N though? wouldn't a single supply connected t= o >>>> AINCOM be enough here? >>> >>> In theory, any AINx could be a common mode input by connecting it to >>> a constant voltage supply. >>=20 >> Technically yes, but there is a pin named AINCOM intended for this >> purpose. Can we do a simplification here? I propose having >>=20 >> common-mode-channel: >> /* AINCOM pin */ >> const: 10 >>=20 >> That way we would only need one common-mode-supply. Would that be okay? >>=20 > > Ideally, we shouldn't limit how the chip can be wired up in the devicetre= e > bindings. It doesn't mean that we have to implement everything in the dri= ver > though. Makes sense. I just have a doubt: In the ADS112c14 bindings, is there a specific reason why you didn't describe common-mode--supply? --=20 Thanks, ~ Kurt