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[212.171.227.71]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6a59e199767sm7243944a12.15.2026.08.24.00.23.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 24 Aug 2026 00:23:56 -0700 (PDT) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Mon, 24 Aug 2026 09:23:55 +0200 Message-Id: From: "Carlo Caione" Subject: Re: [PATCH v2] arm64: dts: mediatek: mt8390-genio-common: add boot phase tags Cc: , , , , "David Lechner" , "Julien Stephan" To: "Carlo Caione" , "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , "Matthias Brugger" , "AngeloGioacchino Del Regno" X-Mailer: aerc 0.22.0 References: <20260730-ccaione-upstream-mt8390-bootph-v2-1-82f67feadf7a@baylibre.com> In-Reply-To: <20260730-ccaione-upstream-mt8390-bootph-v2-1-82f67feadf7a@baylibre.com> On Thu Jul 30, 2026 at 10:04 AM CEST, Carlo Caione wrote: > U-Boot SPL runs after the platform DDR loader has initialized DRAM on > the Genio 510 and Genio 700 EVKs. It needs the debug UART and eMMC > controller, together with their clock, syscon, pinctrl, interrupt and > watchdog providers, to load the firmware FIT. > > Mark the nodes consumed by the current SPL configuration with > 'bootph-pre-ram' so that the canonical devicetree carries the boot-phase > information and bootloaders do not need local overrides. Gentle ping on this. Cheers, -- Carlo Caione