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[144.178.202.138]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6a59e2da49bsm8922721a12.29.2026.08.24.03.04.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 24 Aug 2026 03:04:58 -0700 (PDT) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Mon, 24 Aug 2026 12:04:57 +0200 Message-Id: Cc: "Joerg Roedel (AMD)" , "Will Deacon" , "Robin Murphy" , "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , "Konrad Dybcio" , "Rob Clark" , "Bjorn Andersson" , , , , , Subject: Re: [PATCH 00/12] iommu: qcom_iommu: implement support for instances on MSM8974 From: "Luca Weiss" To: "Dmitry Baryshkov" , "Luca Weiss" X-Mailer: aerc 0.21.0-0-g5549850facc2 References: <20260809-msm8974-iommu-upstream-v1-0-87f5cd492560@oss.qualcomm.com> In-Reply-To: Hi Dmitry, On Tue Aug 11, 2026 at 2:43 PM CEST, Dmitry Baryshkov wrote: > On Mon, Aug 10, 2026 at 12:16:19PM +0200, Luca Weiss wrote: >> Hi Dmitry, >>=20 >> Many thanks for working on this and sending this patch series! >>=20 >> On Sun Aug 9, 2026 at 10:15 PM CEST, Dmitry Baryshkov wrote: >> > Qualcomm MSM8974 platform has five SMMU instances, used by display, GP= U, >> > Venus, VFE (camera) and JPEG encoder. Each of them follows ARM SMMU v1 >> > spec, however they differ from other Qualcomm platforms in the >> > implementation-specific registers and also in interaction with TZ. >> > Venus, MDP and VFE SMMUs are secured and require programming only of >> > CBs, while GPU and JPEG require full programming. >> > >> > This series skips IOMMUs which can't be tested right now (VFE and JPEG= ), >> > and adds only MDP, GPU and Venus (although untested, it is required fo= r >> > display to work) SMMU instances. >>=20 >> I do have a patch series (sent years ago to the mailing lists as well) >> for CAMSS so I can definitely test this in the future. > > Ok, let's land these first, unless VFE IOMMU blocks display on your > platform (Venus was blocking display on APQ8074 DragonBoard). > >> > Note, to get display to work properly one fix is necessary, [1] >> > >> > [1] https://patch.msgid.link/20260809-msm8974-mmcc-fix-v1-1-50f2dcf18d= 2e@oss.qualcomm.com >>=20 >> I've applied this series on v7.2-rc7, with the extra commits between >> that and linux-next for qcom_iommu.c backported so that your series >> applies without conflicts. >>=20 >> So far I'm stuck with the GPU not being able to probe, adding some >> printk's shows that in msm_iommu_new() the call for >> iommu_attach_device() is failing. >>=20 >> [ 5.971154] msm_mdp fd900100.display-controller: failed to load adren= o gpu >> [ 5.972991] msm_mdp fd900100.display-controller: failed to bind fdb00= 000.gpu (ops a3xx_ops [msm]): -16 >> [ 5.974073] msm_mdp fd900100.display-controller: adev bind failed: -1= 6 >> [ 5.974152] panel-s6d6fa1 fd922800.dsi.0: error -EBUSY: Failed to att= ach to DSI host >> [ 5.974230] panel-s6d6fa1 fd922800.dsi.0: probe with driver panel-s6d= 6fa1 failed with error -16 > > See the patch [1], it's picked up for 7.3 I missed replying to you, with this patch the display lights up again! Unfortunately the GPU still seems to have issues, I don't have a log right now (I think even SSH was dropping then with a bunch of log lines appearing in kernel log on screen). I assume kmscube + more complex workloads worked fine for you? Regards Luca > > > [1] https://lore.kernel.org/r/20260730-fix-qcom-smmu-v2-3-18e0daf2d836@os= s.qualcomm.com > >>=20 >> ~ # dmesg | grep iommu >> [ 0.127014] iommu: Default domain type: Translated >> [ 0.127052] iommu: DMA domain TLB invalidation policy: strict mode >> [ 0.739899] platform fdb00000.gpu: Adding to iommu group 0 >> [ 0.741358] qcom-iommu fdc84000.iommu: iommu sec: pgtable size: 90112 >> [ 6.006877] platform fd900100.display-controller: Adding to iommu gro= up 1 >>=20 >> Have you seen any issues like this?