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From: "Hawkins, Nick" <nick.hawkins@hpe.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: "christophe.jaillet@wanadoo.fr" <christophe.jaillet@wanadoo.fr>,
	"simon.horman@corigine.com" <simon.horman@corigine.com>,
	"Verdun, Jean-Marie" <verdun@hpe.com>,
	"davem@davemloft.net" <davem@davemloft.net>,
	"edumazet@google.com" <edumazet@google.com>,
	"kuba@kernel.org" <kuba@kernel.org>,
	"pabeni@redhat.com" <pabeni@redhat.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"krzysztof.kozlowski+dt@linaro.org" 
	<krzysztof.kozlowski+dt@linaro.org>,
	"conor+dt@kernel.org" <conor+dt@kernel.org>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v2 4/5] net: hpe: Add GXP UMAC Driver
Date: Wed, 9 Aug 2023 23:55:48 +0000	[thread overview]
Message-ID: <DM4PR84MB19277DFEB543CF29AB3D58608812A@DM4PR84MB1927.NAMPRD84.PROD.OUTLOOK.COM> (raw)
In-Reply-To: 06d1bc6a-0584-4d62-a2f4-61a42f236b3c@lunn.ch

> > > So what you call a PHY is probably a PCS. Please look at the API used
> > > in driver/net/pcs/. The real PHYs are external.
> > 
> > I doubled checked the internal PHY is considered a PHY, but I believe
> > I can represent it as a PCS.

Hi Andrew,

Thank you for the additional information.

> Is there proper documentation somewhere? register set? Is there
> registers to kick off Base1000X/SGMII auto-neg? Somewhere to get the
> results of the auto-neg? Since this is Base1000X/SGMII you want to
> know if the link between it and the external PHY has established. And
> if there is not an external PHY, but an SFP, this auto neg is with the
> link peer, not the PHY. If it follows 802.3 clause 37, there should
> already be a lot of helper code for you. Is this is licensed core?

After discussing with the ASIC team:
The vendor IP in our ASIC performs a parallel GMII to serial SGMII
translation, including clock recovery and framing. It implements
the entire IEEE 802.3z PCS and is managed with a MCD/MDIO
serial interface. The SGMII interface connects to an external PHY
(and the external PHY is managed with a separate MDIO interface).

Thanks,

-Nick Hawkins


  reply	other threads:[~2023-08-09 23:56 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-02 20:18 [PATCH v2 0/5] ARM: Add GXP UMAC Support nick.hawkins
2023-08-02 20:18 ` [PATCH v2 1/5] dt-bindings: net: Add HPE GXP UMAC MDIO nick.hawkins
2023-08-02 20:18 ` [PATCH v2 2/5] net: hpe: Add " nick.hawkins
2023-08-02 22:39   ` Andrew Lunn
2023-08-16  0:55     ` Hawkins, Nick
2023-08-16  1:29       ` Andrew Lunn
2023-08-02 22:42   ` Randy Dunlap
2023-08-03 11:39   ` Simon Horman
2023-08-02 20:18 ` [PATCH v2 3/5] dt-bindings: net: Add HPE GXP UMAC nick.hawkins
2023-08-02 22:45   ` Andrew Lunn
2023-08-03 15:52   ` Conor Dooley
2023-08-16 16:26     ` Hawkins, Nick
2023-08-17  8:55       ` Conor Dooley
2023-08-02 20:18 ` [PATCH v2 4/5] net: hpe: Add GXP UMAC Driver nick.hawkins
2023-08-02 23:20   ` Andrew Lunn
2023-08-04 20:55     ` Hawkins, Nick
2023-08-05  6:45       ` Andrew Lunn
2023-08-08 20:39         ` Hawkins, Nick
2023-08-08 20:54           ` Andrew Lunn
2023-08-09 23:55             ` Hawkins, Nick [this message]
2023-08-10  1:54               ` Andrew Lunn
2023-08-02 20:18 ` [PATCH v2 5/5] MAINTAINERS: HPE: Add GXP UMAC Networking Files nick.hawkins

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