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boundary=d13001a16f081259898c54cd2d9bc8d1c58a841de8fa9c26a1bf406aef65; micalg=pgp-sha512; protocol="application/pgp-signature" Date: Fri, 13 Nov 2026 08:40:53 +0000 Message-Id: Cc: , , , , , , , , , , , , , , Subject: Re: [PATCH v2] riscv: dts: spacemit: k1: give each PCIe port its own DMA window From: "Troy Mitchell" To: "Vlad Banea" , "Yixun Lan" X-Mailer: aerc 0.21.0-reader-ipc4 References: <20261113023158.2872492-1-montrealtango@gmail.com> In-Reply-To: <20261113023158.2872492-1-montrealtango@gmail.com> X-QQ-SENDSIZE: 520 Feedback-ID: esmtpsz:linux.spacemit.com:qybglogicsvrgz:qybglogicsvrgz3a-0 X-QQ-XMAILINFO: Ndw/mc8X39Obev2zZ1A5EG8IHfjrQAbdcWNAb46z087/j3yzHaV7SbzF jhVGS0YYDZVdVCfwhWzkbt1u02/C8DmUqeVuRmMgWMwVc4nqrJQR+QtmV3keTlMDWbTFyPM 1ySSydmiptj5afB+a8//jmcOOYUIEkaRpMSFnt41KFb0E3HsuWvS8Qo7kRgEXyZsFlU6WZL My5FdLl/QNpCjlmRfB1KR52ZPP6hrxvBdk1WKerky2pDgPj6kyesbDEmwJxkfBeaHCVAF/P p2wD4UXGEHH2Ze+x7HnbJGPSRa2MxOQSNx5Edkt7DdM/ab8wr+mRzVKxvAqkBhjy0Ze5mrL zI7PjgKQlBxStYyOWVPdR8yOxi/dL3aTrNGGuwFkdmY/oGPoNju5kyIZQNWxbfVBmjOHX0b iz168pmwVCOdvoNystu3xV+rkp3RI88PX7fGzbrdN2YDjk5cC7+cwbC/g4MGVuHnMNLJFhU /VIlBtNS/NqNNBL45MSUqzB0ePIwZWIna4UoYzUJVIy/OVoGgfWhtmjqAG7r8u3ekK7U1FH z6LWlkkfAATLtEX9iY6AaGi0qzotMykgslEqeZ2VlbE62PPuxS/HVreDo1t6jCE6tlmuFSo TYAWDRE7xUwxdOss6KHs+W9ebeAEsPNq7WxYin7tu13UpxFj2xdifO5A8SOtz+INB+bNcNt AO7GDyg7p+v+t0uIu2rQk32TByjMcUNsHVIUVLV03CbRUC360/+8kryKnUotK00SwQcCWMY IqQ0vczCGaStTn/ivUJuPwYOGRN6/+2G1SYbSHYTsqLC9g0kyepezluwqm7rTSK6i7mCRwr 1JTrNOIJPqK9/ueeu+/tG/gFBrqRv26teMY+4i0lnzGkw/ZxkFF6qgjetpXThcs6LsEMjWK NQITjADyLn+r88GATcCM7f5Wei8zOuoBumNYIt9EcPb/Fb6UeABkJwYJVw7hU0fdMsThuy7 fRJTiavsbW6gK1lFpcFvMQc/dKjPj59fIb1ucouqXHCvZKGVRAEJ1Nf93vb+QEc5HiIG9li wqqQhJ523Afj5oVO0QkVpSYPXRw6ajzQP9VC+6ZYdJKf7eOdlw0uklv3f4lC40ZtqRKrJl1 g== X-QQ-XMRINFO: MSVp+SPm3vtSI1QTLgDHQqIV1w2oNKDqfg== X-QQ-RECHKSPAM: 0 --d13001a16f081259898c54cd2d9bc8d1c58a841de8fa9c26a1bf406aef65 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 On Fri Nov 13, 2026 at 2:31 AM GMT, Vlad Banea wrote: > On K1 a PCIe master only sees DDR: bus addresses 0-2 GB map to CPU > 0-2 GB and bus 2-16 GB to CPU 4-18 GB. A root port does not forward > upstream an inbound access that falls inside its own memory window, so > dma-ranges must skip each port's own outbound window; the other ports' > windows reach memory. > > The shared pcie-bus skips all three windows, bus 0x8000_0000-0xb7ff_ffff, > which leaves CPU addresses 0x1_0000_0000-0x1_37ff_ffff unreachable from > every port. Give each port its own bus that skips only its own window. > On boards with more than 2 GB of RAM, each port can then reach another > 512-640 MB without SWIOTLB bouncing. > > Signed-off-by: Vlad Banea Reviewed-by: Troy Mitchell --=20 Troy Mitchell --d13001a16f081259898c54cd2d9bc8d1c58a841de8fa9c26a1bf406aef65 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iJcEABYKAD8WIQSL4Ay2cExaPXAQcU2YCe+A+TM0LwUCavbNFSEcdHJveS5taXRj aGVsbEBsaW51eC5zcGFjZW1pdC5jb20ACgkQmAnvgPkzNC/H2AD/ZBD7XI22R1Ie I6EnaBMP4TJ3LTUz+Sq1k4mPe76lNf4BAKulU+P4zOed+4ID8p+GEHDcy/ynwbZX Ra6R4TzswjoJ =nCa0 -----END PGP SIGNATURE----- --d13001a16f081259898c54cd2d9bc8d1c58a841de8fa9c26a1bf406aef65--