From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 142E517BB6; Wed, 12 Mar 2025 09:35:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741772117; cv=none; b=ljf11FizNSdZlu/Z12dRB0KBJwE/JnT0X+umbqveLAYnw9dfuw5gnNrg4Ks4OCKYGaVeNF7ExGBGqQj+SPdrtw5/CnknSCBhj5yAFKSK0XqI5uLNbKzq+CyiOnAo8U7N4sT4b2d+yp/836mYqGAHTHF6khIPpMJUVY2cRdnV6p0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741772117; c=relaxed/simple; bh=EbqFigB/rACpiBc5IEuy5oZksTCmTjC+erFhm6xiNGQ=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=guaRdph42HoE5z/dEtwlvwHsAD2raWBbwyaQnIB1OGXc1jIxBZKsfFwKrbQGhUpeYJodOOyBDGa3RzwRLPmkRNybYHRO8DTqs3PDFLdFxMigCCBVinDLi1gph0KRl+5AxImU/ibQWDd9DlvE6NSpqL6CU5s478el/xUUxKz0pnU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=X7IJpKnr; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="X7IJpKnr" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=WlnjW2BpfjiM63UcojgauSdWRDJorCLGfJ2ZQigHONw=; b=X7IJpKnrsZz4mMD/Y0Imd0BscY ScXYdYmGGHGxceZABGH59dKp6Op9aD6N+QknONUFwhjdzmLrB1JoE+PsYvugL8vWxnuFbfKUx7XAi VEDp3Oc4nYVDL+5TQHgU0c7U6wQHIPi/qVz5A/1YrKHwhemAqcu9zAFG3SGbdPFS5aa15Vy366BfO UTmmU1lHl/mLEjniFwD3m95kk4T8lhPNCKvVHZrwttWqEeGkI6wl87mQHSzC85vsZ6i3VTH1dK8gH B6/yYn4HNBY771Peqn7tumWy1Hpmw1YBOpmcgSdAkcaWU4TmmMiXHEDJDOgr2DM5haKaqBE4GBjzs mpTA2naw==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:38170 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tsIUS-0005Hh-0g; Wed, 12 Mar 2025 09:35:04 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1tsIU5-005vGR-4c; Wed, 12 Mar 2025 09:34:41 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Albert Ou , Alexandre Ghiti , Alexandre Torgue , Andrew Lunn , Conor Dooley , Conor Dooley , "David S. Miller" , devicetree@vger.kernel.org, Emil Renner Berthing , Eric Dumazet , Giuseppe Cavallaro , Jakub Kicinski , Jose Abreu , Krzysztof Kozlowski , Lad Prabhakar , linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Maxime Coquelin , Minda Chen , netdev@vger.kernel.org, Palmer Dabbelt , Paolo Abeni , Paul Walmsley , Rob Herring , Samin Guo Subject: [PATCH net-next v2 4/7] riscv: dts: starfive: remove "snps,en-tx-lpi-clockgating" property Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="utf-8" Message-Id: Sender: Russell King Date: Wed, 12 Mar 2025 09:34:41 +0000 Whether the MII transmit clock can be stopped is primarily a property of the PHY (there is a capability bit that should be checked first.) Whether the MAC is capable of stopping the transmit clock is a separate issue, but this is already handled by the core DesignWare MAC code. As commit "net: stmmac: starfive: use PHY capability for TX clock stop" adds the flag to use the PHY capability, remove the DT property that is now unecessary. Cc: Samin Guo Acked-by: Conor Dooley Signed-off-by: Russell King (Oracle) --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 0d8339357bad..a7aed4a21b65 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -1022,7 +1022,6 @@ gmac0: ethernet@16030000 { snps,force_thresh_dma_mode; snps,axi-config = <&stmmac_axi_setup>; snps,tso; - snps,en-tx-lpi-clockgating; snps,txpbl = <16>; snps,rxpbl = <16>; starfive,syscon = <&aon_syscon 0xc 0x12>; @@ -1053,7 +1052,6 @@ gmac1: ethernet@16040000 { snps,force_thresh_dma_mode; snps,axi-config = <&stmmac_axi_setup>; snps,tso; - snps,en-tx-lpi-clockgating; snps,txpbl = <16>; snps,rxpbl = <16>; starfive,syscon = <&sys_syscon 0x90 0x2>; -- 2.30.2