From mboxrd@z Thu Jan  1 00:00:00 1970
From: Kumar Gala <galak-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCH v3 0/5] i2c: i2c-mpc: make I2C bus speed configurable
Date: Wed, 8 Apr 2009 10:21:12 -0500
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To: Wolfgang Grandegger <wg-5Yr1BZd7O62+XT7JhA+gdA@public.gmane.org>
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On Apr 8, 2009, at 2:25 AM, Wolfgang Grandegger wrote:

>> So I'm a bit concerned with the output we now get:
>>
>> mpc-i2c fffe03000.i2c: clock 0 Hz (dfsrr=16 fdr=49)
>>
>> why 0? is that right?
>
> This is the backward compatibility mode using hard-coded FDR values.  
> The
> output is missleading, I agree.
>
> Wolfgang.

Can the output be fixed.  0 Hz seemed bad to me.

- k