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Sat, 14 Nov 2026 23:32:04 -0800 (PST) Received: from jernej-laptop.localnet ([2a00:ee2:6a02:9300:bb69:6bcf:1b11:e85b]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4bb571cfa2esm183982925e9.2.2026.11.14.23.32.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Nov 2026 23:32:03 -0800 (PST) From: Jernej =?UTF-8?B?xaBrcmFiZWM=?= To: gaohan@iscas.ac.cn, Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Guo Ren , Thomas Gleixner , Radu Rendec , Samuel Holland , Daniel Lezcano , Anup Patel , Stephen Boyd , Brian Masney , Jerome Brunet , Chen-Yu Tsai , Samuel Holland , Philipp Zabel , Alexandre Belloni , Maxime Ripard , Linus Walleij , Andre Przywara , linux-sunxi@lists.linux.dev Cc: Han Gao , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , Conor Dooley , devicetree@vger.kernel.org, linux-csky@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rtc@vger.kernel.org, linux-gpio@vger.kernel.org, Icenowy Zheng Subject: Re: [PATCH 19/19] MAINTAINERS: add an entry for the Allwinner V861 SoC Date: Sun, 15 Nov 2026 08:32:01 +0100 Message-ID: In-Reply-To: <45f41ca4bcc76a6c5d0b9180c6492308ec3e85c9.camel@icenowy.me> References: <20261114-v861-v1-0-eb71ec3ee523@iscas.ac.cn> <20261114-v861-v1-19-eb71ec3ee523@iscas.ac.cn> <45f41ca4bcc76a6c5d0b9180c6492308ec3e85c9.camel@icenowy.me> X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Dne nedelja, 15. november 2026 ob 06:11:31 Srednjeevropski standardni =C4= =8Das je Icenowy Zheng napisal(a): > =E5=9C=A8 2026-11-14=E5=85=AD=E7=9A=84 06:33 +0800=EF=BC=8CHan Gao via B4= Relay=E5=86=99=E9=81=93=EF=BC=9A > > From: Han Gao > >=20 > > Add myself as maintainer for the V861 bindings, clock and pin control > > drivers and device trees. >=20 > I think traditionally sunxi do not add maintainers for specific SoCs. >=20 > Maybe you should patch the regexp of "ARM/Allwinner sunXi SoC support" > item instead. Usually no entries are added at all. Best regards, Jernej >=20 > Thanks, > Icenowy >=20 > >=20 > > Signed-off-by: Han Gao > > --- > > MAINTAINERS | 12 ++++++++++++ > > 1 file changed, 12 insertions(+) > >=20 > > diff --git a/MAINTAINERS b/MAINTAINERS > > index 93abbb315065..dfc300dc1eb2 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -24031,6 +24031,18 @@ F: drivers/irqchip/irq-riscv-intc.c > > F: include/linux/irqchip/riscv-aplic.h > > F: include/linux/irqchip/riscv-imsic.h > > =20 > > +RISC-V ALLWINNER V861 SoC SUPPORT > > +M: Han Gao > > +L: linux-riscv@lists.infradead.org > > +L: linux-sunxi@lists.linux.dev > > +S: Maintained > > +F: Documentation/devicetree/bindings/clock/allwinner,sun252i- > > v861-ccu.yaml > > +F: arch/riscv/boot/dts/allwinner/sun252i-v861* > > +F: drivers/clk/sunxi-ng/ccu-sun252i-v861*.c > > +F: drivers/pinctrl/sunxi/pinctrl-sun252i-v861*.c > > +F: include/dt-bindings/clock/sun252i-v861*.h > > +F: include/dt-bindings/reset/sun252i-v861*.h > > + > > RISC-V ANDES SoC Support > > M: Ben Zong-You Xie > > S: Maintained >=20 >=20