From: Paul Cercueil <paul@crapouillou.net>
To: Stephen Boyd <sboyd@kernel.org>
Cc: Siarhei Volkau <lis8215@gmail.com>,
Siarhei Volkau <lis8215@gmail.com>,
Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org
Subject: Re: [PATCH v6 3/3] clk: Add Ingenic JZ4755 CGU driver
Date: Tue, 01 Nov 2022 20:31:28 +0000 [thread overview]
Message-ID: <GOROKR.IRJ4PQUI1UN7@crapouillou.net> (raw)
In-Reply-To: <20221101192216.5EE5DC433D6@smtp.kernel.org>
Hi Stephen,
Le mar. 1 nov. 2022 à 12:22:14 -0700, Stephen Boyd <sboyd@kernel.org>
a écrit :
> Quoting Paul Cercueil (2022-10-28 00:48:35)
>> Hi Stephen,
>>
>> Le jeu. 27 oct. 2022 � 14:57:14 -0700, Stephen Boyd
>> <sboyd@kernel.org>
>> a �crit :
>> > Quoting Siarhei Volkau (2022-10-27 12:20:23)
>> >> diff --git a/drivers/clk/ingenic/jz4755-cgu.c
>> >> b/drivers/clk/ingenic/jz4755-cgu.c
>> >> new file mode 100644
>> >> index 000000000..d2eb3ae0c
>> >> --- /dev/null
>> >> +++ b/drivers/clk/ingenic/jz4755-cgu.c
>> >> @@ -0,0 +1,346 @@
>> > [...]
>> >> +static void __init jz4755_cgu_init(struct device_node *np)
>> >> +{
>> >> + int retval;
>> >> +
>> >> + cgu = ingenic_cgu_new(jz4755_cgu_clocks,
>> >> + ARRAY_SIZE(jz4755_cgu_clocks),
>> np);
>> >> + if (!cgu) {
>> >> + pr_err("%s: failed to initialise CGU\n",
>> __func__);
>> >> + return;
>> >> + }
>> >> +
>> >> + retval = ingenic_cgu_register_clocks(cgu);
>> >> + if (retval)
>> >> + pr_err("%s: failed to register CGU Clocks\n",
>> >> __func__);
>> >> +
>> >> + ingenic_cgu_register_syscore_ops(cgu);
>> >> +}
>> >> +CLK_OF_DECLARE_DRIVER(jz4755_cgu, "ingenic,jz4755-cgu",
>> >> jz4755_cgu_init);
>> >
>> > Is there another driver that probes this device?
>> > CLK_OF_DECLARE_DRIVER()
>> > is for the situation where we want to probe this device again with
>> > another platform driver. Please add a comment indicating what that
>> > other
>> > driver is.
>>
>> See: 03d570e1a4dc ("clk: ingenic: Use CLK_OF_DECLARE_DRIVER macro")
>>
>
> Does that mean this is also a simple-mfd?
Yes - there's the USB PHY registers randomly in the middle of the
clocks IP.
-Paul
prev parent reply other threads:[~2022-11-01 20:31 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-27 19:20 [PATCH v6 0/3] Add Ingenic JZ4755 CGU driver Siarhei Volkau
2022-10-27 19:20 ` [PATCH v6 1/3] dt-bindings: ingenic: Add support for the JZ4755 CGU Siarhei Volkau
2022-10-27 21:51 ` Stephen Boyd
2022-10-27 19:20 ` [PATCH v6 2/3] dt-bindings: clock: Add Ingenic JZ4755 CGU header Siarhei Volkau
2022-10-27 21:51 ` Stephen Boyd
2022-10-27 19:20 ` [PATCH v6 3/3] clk: Add Ingenic JZ4755 CGU driver Siarhei Volkau
2022-10-27 20:24 ` Paul Cercueil
2022-10-27 21:57 ` Stephen Boyd
2022-10-28 4:39 ` Siarhei Volkau
2022-10-28 7:48 ` Paul Cercueil
2022-11-01 19:22 ` Stephen Boyd
2022-11-01 20:31 ` Paul Cercueil [this message]
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