From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC863C433DF for ; Tue, 26 May 2020 19:22:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 98F4620776 for ; Tue, 26 May 2020 19:22:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="PxJFdkDe" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390891AbgEZTWB (ORCPT ); Tue, 26 May 2020 15:22:01 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:38202 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2391941AbgEZTKp (ORCPT ); Tue, 26 May 2020 15:10:45 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1590520241; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=p9jm//+Z7Q5hm03MZeLwX34SXNnp8zZEFN+1T4rYbdM=; b=PxJFdkDes4KukZbPwS5mMveTS9QphjYgDvbxZ7NKMoj6+38ulMiSySkxN1YXLQc7ZPi0Sn +UpgL7qaS37Izf1cqqD7PdTi4j2eAdyiAkWC1ByRQ8BMkKUKru3O0BetJgCPNmO46Xq5et cW+Zc/BXGPka2lWC4YReEAiLuQxRZSk= Date: Tue, 26 May 2020 21:10:29 +0200 From: Paul Cercueil Subject: Re: [PATCH 1/1] dt-bindings: MIPS: Document Ingenic SoCs binding. To: =?UTF-8?b?5ZGo55Cw5p2w?= Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, tsbogend@alpha.franken.de, hns@goldelico.com, paul@boddie.org.uk, dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com, sernia.zhou@foxmail.com, zhenwenjin@gmail.com Message-Id: In-Reply-To: <20200526170722.17206-2-zhouyanjie@wanyeetech.com> References: <20200526170722.17206-1-zhouyanjie@wanyeetech.com> <20200526170722.17206-2-zhouyanjie@wanyeetech.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Zhou, Le mer. 27 mai 2020 =C3=A0 1:07, =E5=91=A8=E7=90=B0=E6=9D=B0 (Zhou Yanjie)=20 a =C3=A9crit : > Document the available properties for the SoC root node and the > CPU nodes of the devicetree for the Ingenic XBurst SoCs. >=20 > Tested-by: H. Nikolaus Schaller > Tested-by: Paul Boddie > Signed-off-by: =E5=91=A8=E7=90=B0=E6=9D=B0 (Zhou Yanjie) > --- > .../bindings/mips/ingenic/ingenic,cpu.yaml | 57=20 > ++++++++++++++++++++++ > 1 file changed, 57 insertions(+) > create mode 100644=20 > Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml >=20 > diff --git=20 > a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml=20 > b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml > new file mode 100644 > index 000000000000..afb02071a756 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml > @@ -0,0 +1,57 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mips/ingenic/ingenic,cpu.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Bindings for Ingenic XBurst family CPUs > + > +maintainers: > + - =E5=91=A8=E7=90=B0=E6=9D=B0 (Zhou Yanjie) > + > +description: > + Ingenic XBurst family CPUs shall have the following properties. > + > +properties: > + compatible: > + oneOf: > + > + - description: Ingenic XBurst=C2=AE1 CPU Cores > + items: Strip the 'items', put the enum directly. > + enum: > + - ingenic,xburst-mxu1.0 > + - ingenic,xburst-fpu1.0-mxu1.1 > + - ingenic,xburst-fpu2.0-mxu2.0 > + > + - description: Ingenic XBurst=C2=AE2 CPU Cores > + items: Same here. > + enum: > + - ingenic,xburst2-fpu2.1-mxu2.1-smt > + > + reg: > + maxItems: 1 > + > +required: > + - device_type > + - compatible > + - reg device_type is not in the list of your properties. Also, I think you need a clock in there. -Paul > + > +examples: > + - | > + cpus { > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + > + cpu0: cpu@0 { > + device_type =3D "cpu"; > + compatible =3D "ingenic,xburst-fpu1.0-mxu1.1"; > + reg =3D <0>; > + }; > + > + cpu1: cpu@1 { > + device_type =3D "cpu"; > + compatible =3D "ingenic,xburst-fpu1.0-mxu1.1"; > + reg =3D <1>; > + }; > + }; > +... > -- > 2.11.0 >=20