* [PATCH v5 1/5] dt-bindings: arm: aspeed: Add AST2700 board compatible
2025-09-01 3:13 [PATCH v5 0/5] Introduce ASPEED AST2700 BMC SoC Ryan Chen
@ 2025-09-01 3:13 ` Ryan Chen
2025-09-01 3:13 ` [PATCH v5 2/5] arm64: Kconfig: Add Aspeed SoC family (ast27XX) Kconfig support Ryan Chen
` (4 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Ryan Chen @ 2025-09-01 3:13 UTC (permalink / raw)
To: ryan_chen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, Catalin Marinas, Will Deacon,
Arnd Bergmann, Bjorn Andersson, Geert Uytterhoeven,
Nishanth Menon, nfraprado, Taniya Das, Lad Prabhakar,
Kuninori Morimoto, Eric Biggers, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel, soc, Mo Elbadry, Rom Lemarchand,
William Kennington, Yuxiao Zhang, wthai, leohu, dkodihalli,
spuranik
Cc: Conor Dooley
Add device tree compatible string for AST2700 based boards
("aspeed,ast2700-evb" and "aspeed,ast2700") to the Aspeed SoC
board bindings. This allows proper schema validation and
enables support for AST2700 platforms.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
index 456dbf7b5ec8..9d65303ca99e 100644
--- a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
+++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
@@ -105,4 +105,10 @@ properties:
- ufispace,ncplite-bmc
- const: aspeed,ast2600
+ - description: AST2700 based boards
+ items:
+ - enum:
+ - aspeed,ast2700-evb
+ - const: aspeed,ast2700
+
additionalProperties: true
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v5 2/5] arm64: Kconfig: Add Aspeed SoC family (ast27XX) Kconfig support
2025-09-01 3:13 [PATCH v5 0/5] Introduce ASPEED AST2700 BMC SoC Ryan Chen
2025-09-01 3:13 ` [PATCH v5 1/5] dt-bindings: arm: aspeed: Add AST2700 board compatible Ryan Chen
@ 2025-09-01 3:13 ` Ryan Chen
2025-09-01 3:13 ` [PATCH v5 3/5] arm64: dts: aspeed: Add initial AST2700 SoC device tree Ryan Chen
` (3 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Ryan Chen @ 2025-09-01 3:13 UTC (permalink / raw)
To: ryan_chen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, Catalin Marinas, Will Deacon,
Arnd Bergmann, Bjorn Andersson, Geert Uytterhoeven,
Nishanth Menon, nfraprado, Taniya Das, Lad Prabhakar,
Kuninori Morimoto, Eric Biggers, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel, soc, Mo Elbadry, Rom Lemarchand,
William Kennington, Yuxiao Zhang, wthai, leohu, dkodihalli,
spuranik
Support for Aspeed ast27XX 8th generation Aspeed BMCs.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
---
arch/arm64/Kconfig.platforms | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index a88f5ad9328c..531ded0a6a27 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -40,6 +40,12 @@ config ARCH_APPLE
This enables support for Apple's in-house ARM SoC family, such
as the Apple M1.
+config ARCH_ASPEED
+ bool "Aspeed SoC family"
+ help
+ Say yes if you intend to run on an Aspeed ast27XX 8th generation
+ Aspeed BMCs.
+
config ARCH_AXIADO
bool "Axiado SoC Family"
select GPIOLIB
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v5 3/5] arm64: dts: aspeed: Add initial AST2700 SoC device tree
2025-09-01 3:13 [PATCH v5 0/5] Introduce ASPEED AST2700 BMC SoC Ryan Chen
2025-09-01 3:13 ` [PATCH v5 1/5] dt-bindings: arm: aspeed: Add AST2700 board compatible Ryan Chen
2025-09-01 3:13 ` [PATCH v5 2/5] arm64: Kconfig: Add Aspeed SoC family (ast27XX) Kconfig support Ryan Chen
@ 2025-09-01 3:13 ` Ryan Chen
2025-09-01 3:13 ` [PATCH v5 4/5] arm64: dts: aspeed: Add AST2700 Evaluation Board Ryan Chen
` (2 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Ryan Chen @ 2025-09-01 3:13 UTC (permalink / raw)
To: ryan_chen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, Catalin Marinas, Will Deacon,
Arnd Bergmann, Bjorn Andersson, Geert Uytterhoeven,
Nishanth Menon, nfraprado, Taniya Das, Lad Prabhakar,
Kuninori Morimoto, Eric Biggers, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel, soc, Mo Elbadry, Rom Lemarchand,
William Kennington, Yuxiao Zhang, wthai, leohu, dkodihalli,
spuranik
Add initial device tree for the ASPEED 8th BMC SoC family.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
---
arch/arm64/boot/dts/aspeed/aspeed-g7.dtsi | 452 ++++++++++++++++++++++
1 file changed, 452 insertions(+)
create mode 100644 arch/arm64/boot/dts/aspeed/aspeed-g7.dtsi
diff --git a/arch/arm64/boot/dts/aspeed/aspeed-g7.dtsi b/arch/arm64/boot/dts/aspeed/aspeed-g7.dtsi
new file mode 100644
index 000000000000..4816b017f987
--- /dev/null
+++ b/arch/arm64/boot/dts/aspeed/aspeed-g7.dtsi
@@ -0,0 +1,452 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+#include <dt-bindings/clock/aspeed,ast2700-scu.h>
+#include <dt-bindings/reset/aspeed,ast2700-scu.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "aspeed,ast2700";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&gic>;
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ serial3 = &uart3;
+ serial4 = &uart4;
+ serial5 = &uart5;
+ serial6 = &uart6;
+ serial7 = &uart7;
+ serial8 = &uart8;
+ serial9 = &uart9;
+ serial10 = &uart10;
+ serial11 = &uart11;
+ serial12 = &uart12;
+ serial13 = &uart13;
+ serial14 = &uart14;
+ };
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ i-cache-size = <0x8000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <128>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0x0 0x1>;
+ enable-method = "psci";
+ i-cache-size = <0x8000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <128>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0x0 0x2>;
+ enable-method = "psci";
+ i-cache-size = <0x8000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <128>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0x0 0x3>;
+ enable-method = "psci";
+ i-cache-size = <0x8000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <128>;
+ next-level-cache = <&l2>;
+ };
+
+ l2: l2-cache0 {
+ compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
+ cache-size = <0x80000>;
+ cache-line-size = <64>;
+ cache-sets = <1024>;
+ };
+ };
+
+ firmware {
+ optee: optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ atf: trusted-firmware-a@430000000 {
+ reg = <0x4 0x30000000 0x0 0x80000>;
+ no-map;
+ };
+
+ optee_core: optee-core@430080000 {
+ reg = <0x4 0x30080000 0x0 0x1000000>;
+ no-map;
+ };
+ };
+
+ arm-pmu {
+ compatible = "arm,cortex-a35-pmu";
+ interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ arm,cpu-registers-not-fw-configured;
+ always-on;
+ };
+
+ gic: interrupt-controller@12200000 {
+ compatible = "arm,gic-v3";
+ reg = <0 0x12200000 0 0x10000>, /* GICD */
+ <0 0x12280000 0 0x80000>, /* GICR */
+ <0 0x40440000 0 0x1000>; /* GICC */
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ };
+
+ soc0: soc@10000000 {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ intc0_11: interrupt-controller@12101b00 {
+ compatible = "aspeed,ast2700-intc-ic";
+ reg = <0x0 0x12101b00 0x0 0x10>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ syscon0: syscon@12c02000 {
+ compatible = "aspeed,ast2700-scu0", "syscon", "simple-mfd";
+ reg = <0x0 0x12c02000 0x0 0x1000>;
+ ranges = <0x0 0x0 0 0x12c02000 0 0x1000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+
+ silicon-id@0 {
+ compatible = "aspeed,ast2700-silicon-id", "aspeed,silicon-id";
+ reg = <0 0x0 0 0x4>;
+ };
+
+ };
+
+ gpio0: gpio@12c11000 {
+ #gpio-cells = <2>;
+ gpio-controller;
+ compatible = "aspeed,ast2700-gpio";
+ reg = <0x0 0x12c11000 0x0 0x1000>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ ngpios = <12>;
+ clocks = <&syscon0 SCU0_CLK_APB>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ uart4: serial@12c1a000 {
+ compatible = "ns16550a";
+ reg = <0x0 0x12c1a000 0x0 0x1000>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&syscon0 SCU0_CLK_GATE_UART4CLK>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ no-loopback-test;
+ status = "disabled";
+ };
+ };
+
+ soc1: soc@14000000 {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ mdio0: mdio@14040000 {
+ compatible = "aspeed,ast2600-mdio";
+ reg = <0 0x14040000 0 0x8>;
+ resets = <&syscon1 SCU1_RESET_MII>;
+ status = "disabled";
+ };
+
+ mdio1: mdio@14040008 {
+ compatible = "aspeed,ast2600-mdio";
+ reg = <0 0x14040008 0 0x8>;
+ resets = <&syscon1 SCU1_RESET_MII>;
+ status = "disabled";
+ };
+
+ mdio2: mdio@14040010 {
+ compatible = "aspeed,ast2600-mdio";
+ reg = <0 0x14040010 0 0x8>;
+ resets = <&syscon1 SCU1_RESET_MII>;
+ status = "disabled";
+ };
+
+ syscon1: syscon@14c02000 {
+ compatible = "aspeed,ast2700-scu1";
+ reg = <0x0 0x14c02000 0x0 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ intc1_0: interrupt-controller@14c18100 {
+ compatible = "aspeed,ast2700-intc-ic";
+ reg = <0x0 0x14c18100 0x0 0x10>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ interrupts-extended = <&intc0_11 0>;
+ };
+
+ intc1_1: interrupt-controller@14c18110 {
+ compatible = "aspeed,ast2700-intc-ic";
+ reg = <0x0 0x14c18110 0x0 0x10>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ interrupts-extended = <&intc0_11 1>;
+ };
+
+ intc1_2: interrupt-controller@14c18120 {
+ compatible = "aspeed,ast2700-intc-ic";
+ reg = <0x0 0x14c18120 0x0 0x10>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ interrupts-extended = <&intc0_11 2>;
+ };
+
+ intc1_3: interrupt-controller@14c18130 {
+ compatible = "aspeed,ast2700-intc-ic";
+ reg = <0x0 0x14c18130 0x0 0x10>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ interrupts-extended = <&intc0_11 3>;
+ };
+
+ intc1_4: interrupt-controller@14c18140 {
+ compatible = "aspeed,ast2700-intc-ic";
+ reg = <0x0 0x14c18140 0x0 0x10>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ interrupts-extended = <&intc0_11 4>;
+ };
+
+ intc1_5: interrupt-controller@14c18150 {
+ compatible = "aspeed,ast2700-intc-ic";
+ reg = <0x0 0x14c18150 0x0 0x10>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ interrupts-extended = <&intc0_11 5>;
+ };
+
+ uart0: serial@14c33000 {
+ compatible = "ns16550a";
+ reg = <0x0 0x14c33000 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&syscon1 SCU1_CLK_GATE_UART0CLK>;
+ interrupts-extended = <&intc1_4 7>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart1: serial@14c33100 {
+ compatible = "ns16550a";
+ reg = <0x0 0x14c33100 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&syscon1 SCU1_CLK_GATE_UART1CLK>;
+ interrupts-extended = <&intc1_4 8>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart2: serial@14c33200 {
+ compatible = "ns16550a";
+ reg = <0x0 0x14c33200 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&syscon1 SCU1_CLK_GATE_UART2CLK>;
+ interrupts-extended = <&intc1_4 9>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart3: serial@14c33300 {
+ compatible = "ns16550a";
+ reg = <0x0 0x14c33300 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&syscon1 SCU1_CLK_GATE_UART3CLK>;
+ interrupts-extended = <&intc1_4 10>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart5: serial@14c33400 {
+ compatible = "ns16550a";
+ reg = <0x0 0x14c33400 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&syscon1 SCU1_CLK_GATE_UART5CLK>;
+ interrupts-extended = <&intc1_4 11>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart6: serial@14c33500 {
+ compatible = "ns16550a";
+ reg = <0x0 0x14c33500 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&syscon1 SCU1_CLK_GATE_UART6CLK>;
+ interrupts-extended = <&intc1_4 12>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart7: serial@14c33600 {
+ compatible = "ns16550a";
+ reg = <0x0 0x14c33600 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&syscon1 SCU1_CLK_GATE_UART7CLK>;
+ interrupts-extended = <&intc1_4 13>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart8: serial@14c33700 {
+ compatible = "ns16550a";
+ reg = <0x0 0x14c33700 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&syscon1 SCU1_CLK_GATE_UART8CLK>;
+ interrupts-extended = <&intc1_4 14>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart9: serial@14c33800 {
+ compatible = "ns16550a";
+ reg = <0x0 0x14c33800 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&syscon1 SCU1_CLK_GATE_UART9CLK>;
+ interrupts-extended = <&intc1_4 15>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart10: serial@14c33900 {
+ compatible = "ns16550a";
+ reg = <0x0 0x14c33900 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&syscon1 SCU1_CLK_GATE_UART10CLK>;
+ interrupts-extended = <&intc1_4 16>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart11: serial@14c33a00 {
+ compatible = "ns16550a";
+ reg = <0x0 0x14c33a00 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&syscon1 SCU1_CLK_GATE_UART11CLK>;
+ interrupts-extended = <&intc1_4 17>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart12: serial@14c33b00 {
+ compatible = "ns16550a";
+ reg = <0x0 0x14c33b00 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&syscon1 SCU1_CLK_GATE_UART12CLK>;
+ interrupts-extended = <&intc1_4 18>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart13: serial@14c33c00 {
+ compatible = "ns16550a";
+ reg = <0x0 0x14c33c00 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&syscon1 SCU1_CLK_UART13>;
+ interrupts-extended = <&intc1_0 23>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart14: serial@14c33d00 {
+ compatible = "ns16550a";
+ reg = <0x0 0x14c33d00 0x0 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&syscon1 SCU1_CLK_UART14>;
+ interrupts-extended = <&intc1_1 23>;
+ no-loopback-test;
+ status = "disabled";
+ };
+ };
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v5 4/5] arm64: dts: aspeed: Add AST2700 Evaluation Board
2025-09-01 3:13 [PATCH v5 0/5] Introduce ASPEED AST2700 BMC SoC Ryan Chen
` (2 preceding siblings ...)
2025-09-01 3:13 ` [PATCH v5 3/5] arm64: dts: aspeed: Add initial AST2700 SoC device tree Ryan Chen
@ 2025-09-01 3:13 ` Ryan Chen
2025-09-01 5:52 ` Krzysztof Kozlowski
2025-09-01 3:13 ` [PATCH v5 5/5] arm64: configs: Update defconfig for AST2700 platform support Ryan Chen
2025-09-02 13:18 ` [PATCH v5 0/5] Introduce ASPEED AST2700 BMC SoC Rob Herring (Arm)
5 siblings, 1 reply; 10+ messages in thread
From: Ryan Chen @ 2025-09-01 3:13 UTC (permalink / raw)
To: ryan_chen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, Catalin Marinas, Will Deacon,
Arnd Bergmann, Bjorn Andersson, Geert Uytterhoeven,
Nishanth Menon, nfraprado, Taniya Das, Lad Prabhakar,
Kuninori Morimoto, Eric Biggers, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel, soc, Mo Elbadry, Rom Lemarchand,
William Kennington, Yuxiao Zhang, wthai, leohu, dkodihalli,
spuranik
ASPEED AST2700 EVB is prototype development board based
on AST2700 SOC.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
---
arch/arm64/boot/dts/Makefile | 1 +
arch/arm64/boot/dts/aspeed/Makefile | 4 ++++
arch/arm64/boot/dts/aspeed/ast2700-evb.dts | 22 ++++++++++++++++++++++
3 files changed, 27 insertions(+)
create mode 100644 arch/arm64/boot/dts/aspeed/Makefile
create mode 100644 arch/arm64/boot/dts/aspeed/ast2700-evb.dts
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index b0844404eda1..3729e7d480db 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -38,3 +38,4 @@ subdir-y += tesla
subdir-y += ti
subdir-y += toshiba
subdir-y += xilinx
+subdir-y += aspeed
diff --git a/arch/arm64/boot/dts/aspeed/Makefile b/arch/arm64/boot/dts/aspeed/Makefile
new file mode 100644
index 000000000000..ffe7e15017cc
--- /dev/null
+++ b/arch/arm64/boot/dts/aspeed/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0
+
+dtb-$(CONFIG_ARCH_ASPEED) += \
+ ast2700-evb.dtb
diff --git a/arch/arm64/boot/dts/aspeed/ast2700-evb.dts b/arch/arm64/boot/dts/aspeed/ast2700-evb.dts
new file mode 100644
index 000000000000..654b36ec24de
--- /dev/null
+++ b/arch/arm64/boot/dts/aspeed/ast2700-evb.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/dts-v1/;
+#include "aspeed-g7.dtsi"
+
+/ {
+ model = "AST2700 EVB";
+ compatible = "aspeed,ast2700-evb", "aspeed,ast2700";
+
+ chosen {
+ stdout-path = "serial12:115200n8";
+ };
+
+ memory@400000000 {
+ device_type = "memory";
+ reg = <0x4 0x00000000 0x0 0x40000000>;
+ };
+};
+
+&uart12 {
+ status = "okay";
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH v5 4/5] arm64: dts: aspeed: Add AST2700 Evaluation Board
2025-09-01 3:13 ` [PATCH v5 4/5] arm64: dts: aspeed: Add AST2700 Evaluation Board Ryan Chen
@ 2025-09-01 5:52 ` Krzysztof Kozlowski
2025-09-02 0:10 ` Ryan Chen
0 siblings, 1 reply; 10+ messages in thread
From: Krzysztof Kozlowski @ 2025-09-01 5:52 UTC (permalink / raw)
To: Ryan Chen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, Catalin Marinas, Will Deacon,
Arnd Bergmann, Bjorn Andersson, Geert Uytterhoeven,
Nishanth Menon, nfraprado, Taniya Das, Lad Prabhakar,
Kuninori Morimoto, Eric Biggers, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel, soc, Mo Elbadry, Rom Lemarchand,
William Kennington, Yuxiao Zhang, wthai, leohu, dkodihalli,
spuranik
On 01/09/2025 05:13, Ryan Chen wrote:
> ASPEED AST2700 EVB is prototype development board based
> on AST2700 SOC.
>
> Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
> ---
> arch/arm64/boot/dts/Makefile | 1 +
> arch/arm64/boot/dts/aspeed/Makefile | 4 ++++
> arch/arm64/boot/dts/aspeed/ast2700-evb.dts | 22 ++++++++++++++++++++++
> 3 files changed, 27 insertions(+)
> create mode 100644 arch/arm64/boot/dts/aspeed/Makefile
> create mode 100644 arch/arm64/boot/dts/aspeed/ast2700-evb.dts
>
> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
> index b0844404eda1..3729e7d480db 100644
> --- a/arch/arm64/boot/dts/Makefile
> +++ b/arch/arm64/boot/dts/Makefile
> @@ -38,3 +38,4 @@ subdir-y += tesla
> subdir-y += ti
> subdir-y += toshiba
> subdir-y += xilinx
> +subdir-y += aspeed
Messed order. We already asked in other patches to keep alphabetical
order when extending entries.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH v5 4/5] arm64: dts: aspeed: Add AST2700 Evaluation Board
2025-09-01 5:52 ` Krzysztof Kozlowski
@ 2025-09-02 0:10 ` Ryan Chen
0 siblings, 0 replies; 10+ messages in thread
From: Ryan Chen @ 2025-09-02 0:10 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Joel Stanley, Andrew Jeffery, Catalin Marinas,
Will Deacon, Arnd Bergmann, Bjorn Andersson, Geert Uytterhoeven,
Nishanth Menon, nfraprado@collabora.com, Taniya Das,
Lad Prabhakar, Kuninori Morimoto, Eric Biggers,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,
soc@lists.linux.dev, Mo Elbadry, Rom Lemarchand,
William Kennington, Yuxiao Zhang, wthai@nvidia.com,
leohu@nvidia.com, dkodihalli@nvidia.com, spuranik@nvidia.com
> Subject: Re: [PATCH v5 4/5] arm64: dts: aspeed: Add AST2700 Evaluation Board
>
> On 01/09/2025 05:13, Ryan Chen wrote:
> > ASPEED AST2700 EVB is prototype development board based on AST2700
> > SOC.
> >
> > Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
> > ---
> > arch/arm64/boot/dts/Makefile | 1 +
> > arch/arm64/boot/dts/aspeed/Makefile | 4 ++++
> > arch/arm64/boot/dts/aspeed/ast2700-evb.dts | 22
> > ++++++++++++++++++++++
> > 3 files changed, 27 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/aspeed/Makefile
> > create mode 100644 arch/arm64/boot/dts/aspeed/ast2700-evb.dts
> >
> > diff --git a/arch/arm64/boot/dts/Makefile
> > b/arch/arm64/boot/dts/Makefile index b0844404eda1..3729e7d480db
> 100644
> > --- a/arch/arm64/boot/dts/Makefile
> > +++ b/arch/arm64/boot/dts/Makefile
> > @@ -38,3 +38,4 @@ subdir-y += tesla
> > subdir-y += ti
> > subdir-y += toshiba
> > subdir-y += xilinx
> > +subdir-y += aspeed
>
>
> Messed order. We already asked in other patches to keep alphabetical order
> when extending entries.
>
Sorry, it is my wrong, will update in next patch.
Appreciate your review.
> Best regards,
> Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v5 5/5] arm64: configs: Update defconfig for AST2700 platform support
2025-09-01 3:13 [PATCH v5 0/5] Introduce ASPEED AST2700 BMC SoC Ryan Chen
` (3 preceding siblings ...)
2025-09-01 3:13 ` [PATCH v5 4/5] arm64: dts: aspeed: Add AST2700 Evaluation Board Ryan Chen
@ 2025-09-01 3:13 ` Ryan Chen
2025-09-01 5:26 ` Krzysztof Kozlowski
2025-09-02 13:18 ` [PATCH v5 0/5] Introduce ASPEED AST2700 BMC SoC Rob Herring (Arm)
5 siblings, 1 reply; 10+ messages in thread
From: Ryan Chen @ 2025-09-01 3:13 UTC (permalink / raw)
To: ryan_chen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, Catalin Marinas, Will Deacon,
Arnd Bergmann, Bjorn Andersson, Geert Uytterhoeven,
Nishanth Menon, nfraprado, Taniya Das, Lad Prabhakar,
Kuninori Morimoto, Eric Biggers, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel, soc, Mo Elbadry, Rom Lemarchand,
William Kennington, Yuxiao Zhang, wthai, leohu, dkodihalli,
spuranik
Enable options for ASPEED AST2700 SoC.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 58f87d09366c..321a7dbccff8 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -38,6 +38,7 @@ CONFIG_ARCH_AIROHA=y
CONFIG_ARCH_SUNXI=y
CONFIG_ARCH_ALPINE=y
CONFIG_ARCH_APPLE=y
+CONFIG_ARCH_ASPEED=y
CONFIG_ARCH_AXIADO=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM2835=y
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH v5 5/5] arm64: configs: Update defconfig for AST2700 platform support
2025-09-01 3:13 ` [PATCH v5 5/5] arm64: configs: Update defconfig for AST2700 platform support Ryan Chen
@ 2025-09-01 5:26 ` Krzysztof Kozlowski
0 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2025-09-01 5:26 UTC (permalink / raw)
To: Ryan Chen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, Catalin Marinas, Will Deacon,
Arnd Bergmann, Bjorn Andersson, Geert Uytterhoeven,
Nishanth Menon, nfraprado, Taniya Das, Lad Prabhakar,
Kuninori Morimoto, Eric Biggers, devicetree, linux-arm-kernel,
linux-aspeed, linux-kernel, soc, Mo Elbadry, Rom Lemarchand,
William Kennington, Yuxiao Zhang, wthai, leohu, dkodihalli,
spuranik
On 01/09/2025 05:13, Ryan Chen wrote:
> Enable options for ASPEED AST2700 SoC.
>
> Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
> ---
> arch/arm64/configs/defconfig | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v5 0/5] Introduce ASPEED AST2700 BMC SoC
2025-09-01 3:13 [PATCH v5 0/5] Introduce ASPEED AST2700 BMC SoC Ryan Chen
` (4 preceding siblings ...)
2025-09-01 3:13 ` [PATCH v5 5/5] arm64: configs: Update defconfig for AST2700 platform support Ryan Chen
@ 2025-09-02 13:18 ` Rob Herring (Arm)
5 siblings, 0 replies; 10+ messages in thread
From: Rob Herring (Arm) @ 2025-09-02 13:18 UTC (permalink / raw)
To: Ryan Chen
Cc: soc, Conor Dooley, dkodihalli, Arnd Bergmann, Andrew Jeffery,
Kuninori Morimoto, nfraprado, linux-arm-kernel, Will Deacon,
Nishanth Menon, Yuxiao Zhang, Joel Stanley, Eric Biggers,
Taniya Das, Krzysztof Kozlowski, spuranik, Lad Prabhakar,
linux-kernel, Bjorn Andersson, linux-aspeed, Rom Lemarchand,
Geert Uytterhoeven, Mo Elbadry, leohu, Catalin Marinas,
devicetree, William Kennington, wthai
On Mon, 01 Sep 2025 11:13:06 +0800, Ryan Chen wrote:
> This introduces initial support for the Aspeed AST2700 SoC and the AST2700
> Evaluation Board (EVB) to the Linux kernel. The AST27XX is the 8th
> generation Baseboard Management Controller (BMC) SoC from Aspeed,
> featuring improved performance, enhanced security, and expanded I/O
> capabilities compared to previous generations.
>
> AST27XX SOC Family
> - https://www.aspeedtech.com/server_ast2700/
> - https://www.aspeedtech.com/server_ast2720/
> - https://www.aspeedtech.com/server_ast2750/
>
> Bindings Dependencies:
> - intc-ic: Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc.yaml
> - scu/silicon-id: Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
> - gpio: Documentation/devicetree/bindings/gpio/aspeed,ast2400-gpio.yaml
> - mdio: Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml
>
> v5:
> - modify ast27XX 7th generation description to 8th generation.
> - aspeed.yaml
> - modify missing blank line.
> - Kconfig.platforms
> - modify ast27XX 7th generation to 8th generation.
>
> v4:
> - make CHECK_DTBS=y arch/arm64/boot/dts/aspeed/ fix.
> - modify commit message remove itemlize.
> - remove modify aspeed,ast2700-intc.yaml patch.
> - aspeed.yaml
> - Add AST2700 board compatible.
> - aspeed-g7.dtsi
> - modify all size-cells from 1 to 2.
> - add serial aliases, gpio, mdio, uart0 ~ 14.
> - add firmware for optee, reserved memory for atf and optee.
> - modify cpu@0 to cpu0: cpu@0.
> - fix intc-ic for yaml dependency.
> - ast2700-evb.dts
> - update stdout-path = "serial12:115200n8";
>
> v3:
> - https://lore.kernel.org/all/20241212155237.848336-1-kevin_chen@aspeedtech.com/
> - Split clk and reset driver to other commits, which are in series of
> "Add support for AST2700 clk driver".
> - For BMC console by UART12, add uart12 using ASPEED INTC architecture.
>
> aspeed,ast2700-intc.yaml
> - Add minItems to 1 to fix the warning by "make dtbs_check W=1".
> - Add intc1 into example.
>
> Kconfig.platforms
> - Remove MACH_ASPEED_G7.
>
> Ryan Chen (5):
> dt-bindings: arm: aspeed: Add AST2700 board compatible
> arm64: Kconfig: Add Aspeed SoC family (ast27XX) Kconfig support
> arm64: dts: aspeed: Add initial AST2700 SoC device tree
> arm64: dts: aspeed: Add AST2700 Evaluation Board
> arm64: configs: Update defconfig for AST2700 platform support
>
> .../bindings/arm/aspeed/aspeed.yaml | 6 +
> arch/arm64/Kconfig.platforms | 6 +
> arch/arm64/boot/dts/Makefile | 1 +
> arch/arm64/boot/dts/aspeed/Makefile | 4 +
> arch/arm64/boot/dts/aspeed/aspeed-g7.dtsi | 452 ++++++++++++++++++
> arch/arm64/boot/dts/aspeed/ast2700-evb.dts | 22 +
> arch/arm64/configs/defconfig | 1 +
> 7 files changed, 492 insertions(+)
> create mode 100644 arch/arm64/boot/dts/aspeed/Makefile
> create mode 100644 arch/arm64/boot/dts/aspeed/aspeed-g7.dtsi
> create mode 100644 arch/arm64/boot/dts/aspeed/ast2700-evb.dts
>
> --
> 2.34.1
>
>
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
This patch series was applied (using b4) to base:
Base: attempting to guess base-commit...
Base: tags/v6.17-rc1 (exact match)
If this is not the correct base, please add 'base-commit' tag
(or use b4 which does this automatically)
New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/aspeed/' for 20250901031311.1247805-1-ryan_chen@aspeedtech.com:
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: interrupt-controller@12101b00 (aspeed,ast2700-intc-ic): #interrupt-cells: 2 was expected
from schema $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: interrupt-controller@12101b00 (aspeed,ast2700-intc-ic): interrupts: [[0, 192, 4], [0, 193, 4], [0, 194, 4], [0, 195, 4], [0, 196, 4], [0, 197, 4], [0, 198, 4], [0, 199, 4], [0, 200, 4], [0, 201, 4]] is too long
from schema $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: syscon@12c02000 (aspeed,ast2700-scu0): #size-cells: 1 was expected
from schema $id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: syscon@14c02000 (aspeed,ast2700-scu1): compatible: ['aspeed,ast2700-scu1'] is too short
from schema $id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: syscon@14c02000 (aspeed,ast2700-scu1): 'ranges' is a required property
from schema $id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: syscon@14c02000 (aspeed,ast2700-scu1): '#address-cells' is a required property
from schema $id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: syscon@14c02000 (aspeed,ast2700-scu1): '#size-cells' is a required property
from schema $id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: interrupt-controller@14c18100 (aspeed,ast2700-intc-ic): #interrupt-cells: 2 was expected
from schema $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: interrupt-controller@14c18100 (aspeed,ast2700-intc-ic): interrupts-extended: [[5, 0]] is too short
from schema $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: interrupt-controller@14c18110 (aspeed,ast2700-intc-ic): #interrupt-cells: 2 was expected
from schema $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: interrupt-controller@14c18110 (aspeed,ast2700-intc-ic): interrupts-extended: [[5, 1]] is too short
from schema $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: interrupt-controller@14c18120 (aspeed,ast2700-intc-ic): #interrupt-cells: 2 was expected
from schema $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: interrupt-controller@14c18120 (aspeed,ast2700-intc-ic): interrupts-extended: [[5, 2]] is too short
from schema $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: interrupt-controller@14c18130 (aspeed,ast2700-intc-ic): #interrupt-cells: 2 was expected
from schema $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: interrupt-controller@14c18130 (aspeed,ast2700-intc-ic): interrupts-extended: [[5, 3]] is too short
from schema $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: interrupt-controller@14c18140 (aspeed,ast2700-intc-ic): #interrupt-cells: 2 was expected
from schema $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: interrupt-controller@14c18140 (aspeed,ast2700-intc-ic): interrupts-extended: [[5, 4]] is too short
from schema $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: interrupt-controller@14c18150 (aspeed,ast2700-intc-ic): #interrupt-cells: 2 was expected
from schema $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc.yaml#
arch/arm64/boot/dts/aspeed/ast2700-evb.dtb: interrupt-controller@14c18150 (aspeed,ast2700-intc-ic): interrupts-extended: [[5, 5]] is too short
from schema $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc.yaml#
^ permalink raw reply [flat|nested] 10+ messages in thread