From: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
To: Maxime Ripard <maxime@cerno.tech>
Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
devel@driverdev.osuosl.org, linux-sunxi@googlegroups.com,
Yong Deng <yong.deng@magewell.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@siol.net>,
Jonathan Corbet <corbet@lwn.net>,
Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>,
Helen Koike <helen.koike@collabora.com>,
Dafna Hirschfeld <dafna.hirschfeld@collabora.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Sakari Ailus <sakari.ailus@linux.intel.com>,
Hans Verkuil <hans.verkuil@cisco.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
kevin.lhopital@hotmail.com
Subject: Re: [PATCH v2 09/19] ARM: dts: sunxi: h3/h5: Add CSI controller port for parallel input
Date: Wed, 2 Dec 2020 16:02:09 +0100 [thread overview]
Message-ID: <X8escb4SZXEpiR0n@aptenodytes> (raw)
In-Reply-To: <20201201121405.at4pwxon56ecwrx6@gilmour>
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Hi,
On Tue 01 Dec 20, 13:14, Maxime Ripard wrote:
> On Sat, Nov 28, 2020 at 03:28:29PM +0100, Paul Kocialkowski wrote:
> > Since the CSI controller binding is getting a bit more complex due
> > to the addition of MIPI CSI-2 bridge support, make the ports node
> > explicit with the parallel port.
> >
> > This way, it's clear that the controller only supports parallel
> > interface input and there's no confusion about the port number.
> >
> > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
> > ---
> > arch/arm/boot/dts/sunxi-h3-h5.dtsi | 9 +++++++++
> > 1 file changed, 9 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> > index 9be13378d4df..02b698cace6a 100644
> > --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> > +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> > @@ -803,6 +803,15 @@ csi: camera@1cb0000 {
> > pinctrl-names = "default";
> > pinctrl-0 = <&csi_pins>;
> > status = "disabled";
> > +
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + csi_in_parallel: port@0 {
> > + reg = <0>;
> > + };
> > + };
> > };
>
> This will create a DTC warning, since port@0 is the only node, and is
> equivalent to port
I'm not seeing the warning when running dtbs_check.
More generally, why is it a problem that there's only one node defined?
One issue that I did see is that the port node doesn't have an endpoint
here, so I will remove the requirement to have an endpoint in the bindings
documentation to allow this kind of definition.
Cheers,
Paul
--
Paul Kocialkowski, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com
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next prev parent reply other threads:[~2020-12-02 15:03 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-28 14:28 [PATCH v2 00/19] Allwinner MIPI CSI-2 support for A31/V3s/A83T Paul Kocialkowski
2020-11-28 14:28 ` [PATCH v2 01/19] docs: phy: Add a part about PHY mode and submode Paul Kocialkowski
2020-12-01 10:37 ` Maxime Ripard
2020-11-28 14:28 ` [PATCH v2 02/19] phy: Distinguish between Rx and Tx for MIPI D-PHY with submodes Paul Kocialkowski
2020-11-28 14:28 ` [PATCH v2 03/19] phy: allwinner: phy-sun6i-mipi-dphy: Support D-PHY Rx mode for MIPI CSI-2 Paul Kocialkowski
2020-12-01 10:38 ` Maxime Ripard
2020-11-28 14:28 ` [PATCH v2 04/19] media: sun6i-csi: Use common V4L2 format info for storage bpp Paul Kocialkowski
2020-12-01 10:39 ` Maxime Ripard
2020-11-28 14:28 ` [PATCH v2 05/19] media: sun6i-csi: Only configure the interface data width for parallel Paul Kocialkowski
2020-11-28 14:28 ` [PATCH v2 06/19] dt-bindings: media: sun6i-a31-csi: Add MIPI CSI-2 input port Paul Kocialkowski
2020-12-01 10:43 ` Maxime Ripard
2020-12-02 14:16 ` Paul Kocialkowski
2020-12-08 19:54 ` Rob Herring
2020-11-28 14:28 ` [PATCH v2 07/19] media: sun6i-csi: Add support for MIPI CSI-2 bridge input Paul Kocialkowski
2020-12-01 12:12 ` Maxime Ripard
2020-12-02 14:19 ` Paul Kocialkowski
2020-12-02 15:40 ` Maxime Ripard
2020-12-02 16:07 ` Paul Kocialkowski
2020-11-28 14:28 ` [PATCH v2 08/19] ARM: dts: sun8i: a83t: Add CSI controller ports Paul Kocialkowski
2020-11-28 14:28 ` [PATCH v2 09/19] ARM: dts: sunxi: h3/h5: Add CSI controller port for parallel input Paul Kocialkowski
2020-12-01 12:14 ` Maxime Ripard
2020-12-02 15:02 ` Paul Kocialkowski [this message]
2020-12-02 15:46 ` Maxime Ripard
2020-11-28 14:28 ` [PATCH v2 10/19] ARM: dts: sun8i: v3s: Add CSI1 " Paul Kocialkowski
2020-11-28 14:28 ` [PATCH v2 11/19] arm64: dts: allwinner: a64: Add CSI " Paul Kocialkowski
2020-11-28 14:28 ` [PATCH v2 12/19] dt-bindings: media: Add A31 MIPI CSI-2 bindings documentation Paul Kocialkowski
2020-12-01 12:15 ` Maxime Ripard
2020-11-28 14:28 ` [PATCH v2 13/19] media: sunxi: Add support for the A31 MIPI CSI-2 controller Paul Kocialkowski
2020-12-01 12:20 ` Maxime Ripard
2020-12-02 14:44 ` Paul Kocialkowski
2020-12-02 15:48 ` Maxime Ripard
2020-12-02 16:09 ` Paul Kocialkowski
2020-11-28 14:28 ` [PATCH v2 14/19] ARM: dts: sun8i: v3s: Add nodes for MIPI CSI-2 support Paul Kocialkowski
2020-11-28 14:28 ` [PATCH v2 15/19] MAINTAINERS: Add entry for the Allwinner A31 MIPI CSI-2 bridge Paul Kocialkowski
2020-11-28 14:28 ` [PATCH v2 16/19] dt-bindings: media: Add A83T MIPI CSI-2 bindings documentation Paul Kocialkowski
2020-12-11 3:12 ` Rob Herring
2020-11-28 14:28 ` [PATCH v2 17/19] media: sunxi: Add support for the A83T MIPI CSI-2 controller Paul Kocialkowski
2020-11-28 14:28 ` [PATCH v2 18/19] ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node Paul Kocialkowski
2020-11-28 14:28 ` [PATCH v2 19/19] MAINTAINERS: Add entry for the Allwinner A83T MIPI CSI-2 bridge Paul Kocialkowski
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