From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DEB61C433E0 for ; Wed, 10 Mar 2021 14:20:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B4BB164FF2 for ; Wed, 10 Mar 2021 14:20:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233035AbhCJOTu convert rfc822-to-8bit (ORCPT ); Wed, 10 Mar 2021 09:19:50 -0500 Received: from aposti.net ([89.234.176.197]:59880 "EHLO aposti.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233030AbhCJOTh (ORCPT ); Wed, 10 Mar 2021 09:19:37 -0500 Date: Wed, 10 Mar 2021 14:19:09 +0000 From: Paul Cercueil Subject: Re: [PATCH 1/3] pinctrl: Ingenic: Fix bug and reformat the code. To: Andy Shevchenko Cc: =?UTF-8?b?5ZGo55Cw5p2w?= , Linus Walleij , Rob Herring , linux-mips@vger.kernel.org, GPIO SUBSYSTEM , Linux Kernel Mailing List , devicetree , "H. Nikolaus Schaller" , paul@boddie.org.uk, dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com, sernia.zhou@foxmail.com Message-Id: In-Reply-To: References: <1615308057-88387-1-git-send-email-zhouyanjie@wanyeetech.com> <1615308057-88387-2-git-send-email-zhouyanjie@wanyeetech.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Le mer. 10 mars 2021 à 16:03, Andy Shevchenko a écrit : > On Tue, Mar 9, 2021 at 6:42 PM 周琰杰 (Zhou Yanjie) > wrote: >> >> 1.Add tabs before values to align the code in the macro definition >> section. >> 2.Fix bugs related to the MAC of JZ4770, add missing pins to the >> MII group. >> 3.Adjust the sequence of X1830's SSI related codes to make it >> consistent >> with other Ingenic SoCs. >> 4.Fix bug in "ingenic_pinconf_get()", so that it can read the >> configuration >> of X1830 SoC correctly. >> > > Split to 4 patches then. > It's quite hard for everybody to handle regression fixes like this. Agreed. And the fixes should have a Fixes: tag. -Paul