Re: [PATCH 00/12] Enable networking support for StarFive JH7100 SoC

Conor Dooley
2023-02-11T11:11:54Z

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Hey Cristian!

+CC Arnd, Prabhakar

On Sat, Feb 11, 2023 at 05:18:09AM +0200, Cristian Ciocaltea wrote:
> This patch series adds ethernet support for the StarFive JH7100 SoC and
> makes it available for the StarFive VisionFive V1 and BeagleV Starlight
> boards, although I could only validate on the former SBC.
>
> The work is heavily based on the reference implementation [1] and requires
> the non-coherent DMA support provided by Emil via the Sifive Composable
> Cache controller.
>
> Also note there is an overlap in "[PATCH 08/12] net: stmmac: Add glue layer
> for StarFive JH7100 SoC" with the Yanhong Wang's upstreaming attempt [2]:
> "[PATCH v4 5/7] net: stmmac: Add glue layer for StarFive JH7110 SoCs".
>
> Since I cannot test the JH7110 SoC, I dropped the support for it from Emil's
> variant of the stmmac glue layer. Hence, we might need a bit of coordination
> in order to get this properly merged.

To be honest, that one is the least of your worries sequencing wise.
Anything doing non-coherent DMA on RISC-V that doesn't use instructions is
dependant on Prabhakar's series:
https://lore.kernel.org/linux-riscv/20230106185526.260163-1-prabhakar.mahadev-lad.rj@bp.renesas.com/#t
That's kinda stalled out though, waiting on Arnd to make some changes to
the cross-arch DMA code:
https://lore.kernel.org/linux-riscv/ea4cb121-97e9-4365-861a-b3635fd34721@app.fastmail.com/

I was talking to Emil about the non-coherent support at FOSDEM actually,
and I see no real reason not to bring the JH7100 non-coherent support in
if we are doing it for other SoCs.

So yeah, hopefully we shall get there at some point soonTM...

Sorry,
Conor.

> [1] https://github.com/starfive-tech/linux/commits/visionfive
> [2] https://lore.kernel.org/linux-riscv/20230118061701.30047-6-yanhong.wang@starfivetech.com/
>
> Cristian Ciocaltea (7):
> dt-bindings: riscv: sifive-ccache: Add compatible for StarFive JH7100
> SoC
> dt-bindings: riscv: sifive-ccache: Add 'uncached-offset' property
> dt-bindings: net: Add StarFive JH7100 SoC
> riscv: dts: starfive: Add dma-noncoherent for JH7100 SoC
> riscv: dts: starfive: jh7100: Add ccache DT node
> riscv: dts: starfive: jh7100: Add sysmain and gmac DT nodes
> riscv: dts: starfive: jh7100-common: Setup pinmux and enable gmac
>
> Emil Renner Berthing (5):
> soc: sifive: ccache: Add StarFive JH7100 support
> soc: sifive: ccache: Add non-coherent DMA handling
> riscv: Implement non-coherent DMA support via SiFive cache flushing
> dt-bindings: mfd: syscon: Add StarFive JH7100 sysmain compatible
> net: stmmac: Add glue layer for StarFive JH7100 SoC
>
> .../devicetree/bindings/mfd/syscon.yaml | 1 +
> .../devicetree/bindings/net/snps,dwmac.yaml | 15 +-
> .../bindings/net/starfive,jh7100-dwmac.yaml | 106 ++++++++++++
> .../bindings/riscv/sifive,ccache0.yaml | 33 +++-
> MAINTAINERS | 6 +
> arch/riscv/Kconfig | 6 +-
> .../boot/dts/starfive/jh7100-common.dtsi | 78 +++++++++
> arch/riscv/boot/dts/starfive/jh7100.dtsi | 55 +++++++
> arch/riscv/mm/dma-noncoherent.c | 37 ++++-
> drivers/net/ethernet/stmicro/stmmac/Kconfig | 12 ++
> drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
> .../ethernet/stmicro/stmmac/dwmac-starfive.c | 155 ++++++++++++++++++
> drivers/soc/sifive/Kconfig | 1 +
> drivers/soc/sifive/sifive_ccache.c | 71 +++++++-
> include/soc/sifive/sifive_ccache.h | 21 +++
> 15 files changed, 587 insertions(+), 11 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/net/starfive,jh7100-dwmac.yaml
> create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>
> --
> 2.39.1
>

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