Re: [PATCH v9 2/5] iommu: Implement of_iommu_get_resv_regions()

Thierry Reding
2022-10-19T18:03:42Z

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On Fri, Sep 23, 2022 at 02:35:54PM +0200, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> This is an implementation that IOMMU drivers can use to obtain reserved
> memory regions from a device tree node. It uses the reserved-memory DT
> bindings to find the regions associated with a given device. If these
> regions are marked accordingly, identity mappings will be created for
> them in the IOMMU domain that the devices will be attached to.
>
> Cc: Frank Rowand <frowand.list@gmail.com>
> Cc: devicetree@vger.kernel.org
> Reviewed-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Changes in v9:
> - address review comments by Robin Murphy:
> - warn about non-direct mappings since they are not supported yet
> - cleanup code to require less indentation
> - narrow scope of variables
>
> Changes in v8:
> - cleanup set-but-unused variables
>
> Changes in v6:
> - remove reference to now unused dt-bindings/reserved-memory.h include
>
> Changes in v5:
> - update for new "iommu-addresses" device tree bindings
>
> Changes in v4:
> - fix build failure on !CONFIG_OF_ADDRESS
>
> Changes in v3:
> - change "active" property to identity mapping flag that is part of the
> memory region specifier (as defined by #memory-region-cells) to allow
> per-reference flags to be used
>
> Changes in v2:
> - use "active" property to determine whether direct mappings are needed
>
> drivers/iommu/of_iommu.c | 104 +++++++++++++++++++++++++++++++++++++++
> include/linux/of_iommu.h | 8 +++
> 2 files changed, 112 insertions(+)
>
> diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c
> index 5696314ae69e..0bf2b08bca0a 100644
> --- a/drivers/iommu/of_iommu.c
> +++ b/drivers/iommu/of_iommu.c
> @@ -11,6 +11,7 @@
> #include <linux/module.h>
> #include <linux/msi.h>
> #include <linux/of.h>
> +#include <linux/of_address.h>
> #include <linux/of_iommu.h>
> #include <linux/of_pci.h>
> #include <linux/pci.h>
> @@ -172,3 +173,106 @@ const struct iommu_ops *of_iommu_configure(struct device *dev,
>
> return ops;
> }
> +
> +static inline bool check_direct_mapping(struct device *dev, struct resource *phys,
> + phys_addr_t start, phys_addr_t end)
> +{
> + if (start != phys->start || end != phys->end) {
> + dev_warn(dev, "treating non-direct mapping [%pr] -> [%pap-%pap] as reservation\n",
> + &phys, &start, &end);
> + return false;
> + }
> +
> + return true;
> +}
> +
> +/**
> + * of_iommu_get_resv_regions - reserved region driver helper for device tree
> + * @dev: device for which to get reserved regions
> + * @list: reserved region list
> + *
> + * IOMMU drivers can use this to implement their .get_resv_regions() callback
> + * for memory regions attached to a device tree node. See the reserved-memory
> + * device tree bindings on how to use these:
> + *
> + * Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
> + */
> +void of_iommu_get_resv_regions(struct device *dev, struct list_head *list)
> +{
> +#if IS_ENABLED(CONFIG_OF_ADDRESS)
> + struct of_phandle_iterator it;
> + int err;
> +
> + of_for_each_phandle(&it, err, dev->of_node, "memory-region", NULL, 0) {
> + const __be32 *maps, *end;
> + struct resource res;
> + int size;
> +
> + memset(&res, 0, sizeof(res));
> +
> + /*
> + * The "reg" property is optional and can be omitted by reserved-memory regions
> + * that represent reservations in the IOVA space, which are regions that should
> + * not be mapped.
> + */
> + if (of_find_property(it.node, "reg", NULL)) {
> + err = of_address_to_resource(it.node, 0, &res);
> + if (err < 0) {
> + dev_err(dev, "failed to parse memory region %pOF: %d\n",
> + it.node, err);
> + continue;
> + }
> + }
> +
> + maps = of_get_property(it.node, "iommu-addresses", &size);
> + if (!maps)
> + continue;
> +
> + end = maps + size / sizeof(__be32);
> +
> + while (maps < end) {
> + struct device_node *np;
> + u32 phandle;
> + int na, ns;
> +
> + phandle = be32_to_cpup(maps++);
> + np = of_find_node_by_phandle(phandle);
> + na = of_n_addr_cells(np);
> + ns = of_n_size_cells(np);
> +
> + if (np == dev->of_node) {
> + int prot = IOMMU_READ | IOMMU_WRITE;
> + struct iommu_resv_region *region;
> + enum iommu_resv_type type;
> + phys_addr_t start;
> + size_t length;
> +
> + start = of_translate_dma_address(np, maps);

I just came across an issue when extending the testing from simple-
framebuffer to the full display engine, with the main difference being
that the fill display engine is hooked up both to the IOMMU and to the
memory controller via the interconnects property ("dma-mem").

The latter seems to throw off the of_translate_dma_address() because we
have a top-level bus@0 node that sets #address-cells = <1> and #size-
cells = <1>, which is sufficient to represent the "reg" entries for the
devices. However, for the reserved-memory node needs #address-cells =
<2> and #size-cells = <2> to make sure we can describe memory regions
above the 4 GiB boundary (and potentially larger than 4 GiB, too).

What happens now is that of_translate_dma_address() will find the DMA
parent for the display engine, which is the memory controller, which
also has #address-cells = <2> and #size-cells = <2> for the same reason
as the reserved-memory node. In other words, what this tries to model is
that for DMA accesses, we span more than the 4 GiB range that is
sufficient to address registers for IP blocks.

However, of_translate_dma_address() then ends up getting #address-cells
and #size-cells from the *parent* of the DMA parent. And then everything
falls apart during translation.

Any idea if I'm doing something wrong? Or is the code wrong and it's not
actually using the right cell counts? Should it be using the cell counts
from the DMA parent rather than its parent bus?

Thierry

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