From: Thierry Reding <thierry.reding@gmail.com>
To: Vidya Sagar <vidyas@nvidia.com>
Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
jonathanh@nvidia.com, mperttunen@nvidia.com,
devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org, kthota@nvidia.com,
mmaddireddy@nvidia.com, sagar.tv@gmail.com
Subject: Re: [PATCH V1] arm64: tegra: Fix Prefetchable aperture ranges of Tegra234 PCIe controllers
Date: Mon, 24 Oct 2022 15:16:22 +0200 [thread overview]
Message-ID: <Y1aQJvrpfpueeeLa@orome> (raw)
In-Reply-To: <20220928062731.18032-1-vidyas@nvidia.com>
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On Wed, Sep 28, 2022 at 11:57:31AM +0530, Vidya Sagar wrote:
> commit edf408b946d3 ("PCI: dwc: Validate iATU outbound mappings against
> hardware constraints") exposes an issue with the existing partitioning of
> the aperture space where the Prefetchable apertures of controllers
> C5, C7 and C9 in Tegra234 cross the 32GB boundary hardware constraint.
> This patch makes sure that the Prefetchable region doesn't spill over
> the 32GB boundary.
>
> Fixes: ec142c44b026 ("arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT")
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
> arch/arm64/boot/dts/nvidia/tegra234.dtsi | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Applied, thanks.
Thierry
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prev parent reply other threads:[~2022-10-24 14:42 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-28 6:27 [PATCH V1] arm64: tegra: Fix Prefetchable aperture ranges of Tegra234 PCIe controllers Vidya Sagar
2022-10-10 6:32 ` Vidya Sagar
2022-10-24 13:16 ` Thierry Reding [this message]
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