From: Bagas Sanjaya <bagasdotme@gmail.com>
To: Sean Anderson <sean.anderson@seco.com>
Cc: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
linux-phy@lists.infradead.org, Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
linuxppc-dev@lists.ozlabs.org,
Ioana Ciornei <ioana.ciornei@nxp.com>,
linux-arm-kernel@lists.infradead.org,
Camelia Alexandra Groza <camelia.groza@nxp.com>,
Madalin Bucur <madalin.bucur@nxp.com>,
Jonathan Corbet <corbet@lwn.net>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-clk@vger.kernel.org, linux-doc@vger.kernel.org
Subject: Re: [PATCH v8 4/9] phy: fsl: Add Lynx 10G SerDes driver
Date: Sat, 29 Oct 2022 16:11:30 +0700 [thread overview]
Message-ID: <Y1zuQvkyqtHOPGrk@debian.me> (raw)
In-Reply-To: <20221027191113.403712-5-sean.anderson@seco.com>
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On Thu, Oct 27, 2022 at 03:11:08PM -0400, Sean Anderson wrote:
> .. only:: subproject and html
> diff --git a/Documentation/driver-api/phy/lynx_10g.rst b/Documentation/driver-api/phy/lynx_10g.rst
> new file mode 100644
> index 000000000000..ebbf4dd86726
> --- /dev/null
> +++ b/Documentation/driver-api/phy/lynx_10g.rst
> @@ -0,0 +1,58 @@
> +.. SPDX-License-Identifier: GPL-2.0
> +
> +===========================
> +Lynx 10G Phy (QorIQ SerDes)
> +===========================
> +
> +Using this phy
> +--------------
> +
> +:c:func:`phy_get` just gets (or creates) a new :c:type:`phy` with the lanes
> +described in the phandle. :c:func:`phy_init` is what actually reserves the
> +lanes for use. Unlike some other drivers, when the phy is created, there is no
> +default protocol. :c:func:`phy_set_mode <phy_set_mode_ext>` must be called in
> +order to set the protocol.
> +
> +Supporting SoCs
> +---------------
> +
> +Each new SoC needs a :c:type:`struct lynx_conf <lynx_conf>`, containing the
> +number of lanes in each device, the endianness of the device, and the helper
> +functions to use when selecting protocol controllers. For example, the
> +configuration for the LS1046A is::
Did you mean struct lynx_cfg as in below snippet?
> +
> + static const struct lynx_cfg ls1046a_cfg = {
> + .lanes = 4,
> + .endian = REGMAP_ENDIAN_BIG,
> + .mode_conflict = lynx_ls_mode_conflict,
> + .mode_apply = lynx_ls_mode_apply,
> + .mode_init = lynx_ls_mode_init,
> + };
> +
> +The ``mode_`` functions will generally be common to all SoCs in a series (e.g.
> +all Layerscape SoCs or all T-series SoCs).
> +
> +In addition, you will need to add a device node as documented in
> +``Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml``. This lets the
> +driver know which lanes are available to configure.
> +
> +Supporting Protocols
> +--------------------
> +
> +Each protocol is a combination of values which must be programmed into the lane
> +registers. To add a new protocol, first add it to :c:type:`enum lynx_protocol
> +<lynx_protocol>`. Add a new entry to `lynx_proto_params`, and populate the
> +appropriate fields. Modify `lynx_lookup_proto` to map the :c:type:`enum
> +phy_mode <phy_mode>` to :c:type:`enum lynx_protocol <lynx_protocol>`. Update
> +the ``mode_conflict``, ``mode_apply``, and ``mode_init`` helpers are updated to
> +support your protocol.
> +
These lynx_ keywords should be in double backticks to be consistent
(rendered as inline code).
Also, don't forget to add conjunctions:
"... Then modify ``lynx_lookup_proto`` ... Finally, update the ...
helpers ..."
> +You may need to modify :c:func:`lynx_set_mode` in order to support your
> +protocol. This can happen when you have added members to :c:type:`struct
> +lynx_proto_params <lynx_proto_params>`. It can also happen if you have specific
> +clocking requirements, or protocol-specific registers to program.
> +
> +Internal API Reference
> +----------------------
> +
> +.. kernel-doc:: drivers/phy/freescale/phy-fsl-lynx-10g.c
Otherwise LGTM, thanks.
--
An old man doll... just what I always wanted! - Clara
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next prev parent reply other threads:[~2022-10-29 9:11 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-27 19:11 [PATCH v8 0/9] phy: Add support for Lynx 10G SerDes Sean Anderson
2022-10-27 19:11 ` [PATCH v8 1/9] dt-bindings: phy: Add 2500BASE-X and 10GBASE-R Sean Anderson
2022-10-27 19:11 ` [PATCH v8 2/9] dt-bindings: phy: Add Lynx 10G phy binding Sean Anderson
2022-10-27 19:11 ` [PATCH v8 3/9] dt-bindings: clock: Add ids for Lynx 10g PLLs Sean Anderson
2022-10-27 21:49 ` Stephen Boyd
2022-10-27 21:59 ` Sean Anderson
2022-10-27 19:11 ` [PATCH v8 4/9] phy: fsl: Add Lynx 10G SerDes driver Sean Anderson
2022-10-27 23:03 ` Stephen Boyd
2022-10-28 16:13 ` Sean Anderson
2022-10-28 16:33 ` Sean Anderson
2022-11-01 20:10 ` Stephen Boyd
2022-11-01 23:27 ` Sean Anderson
2022-12-07 2:17 ` Stephen Boyd
2022-12-08 15:36 ` Sean Anderson
2022-12-12 23:37 ` Stephen Boyd
2022-12-13 22:34 ` Sean Anderson
2022-11-01 20:07 ` Stephen Boyd
2022-11-01 23:41 ` Sean Anderson
2022-10-29 9:11 ` Bagas Sanjaya [this message]
2022-10-31 15:33 ` Sean Anderson
2022-10-27 19:11 ` [PATCH v8 5/9] arm64: dts: ls1046a: Add serdes bindings Sean Anderson
2022-10-27 19:11 ` [PATCH v8 6/9] arm64: dts: ls1046ardb: " Sean Anderson
2022-10-27 19:11 ` [PATCH v8 7/9] arm64: dts: ls1088a: " Sean Anderson
2022-10-27 19:11 ` [PATCH v8 8/9] arm64: dts: ls1088a: Prevent PCSs from probing as phys Sean Anderson
2022-10-27 19:11 ` [PATCH v8 9/9] [DO NOT MERGE] arm64: dts: ls1088ardb: Add serdes bindings Sean Anderson
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