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[2003:e4:1f20:1d00:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id b19-20020a056402139300b004637489cf08sm1168773edv.88.2022.11.11.07.19.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Nov 2022 07:19:32 -0800 (PST) Date: Fri, 11 Nov 2022 16:19:30 +0100 From: Thierry Reding To: Linus Walleij Cc: Rob Herring , Krzysztof Kozlowski , Jon Hunter , Prathamesh Shete , Vidya Sagar , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-gpio@vger.kernel.org Subject: Re: [PATCH v3 0/4] pinctrl: tegra: Separate Tegra194 instances Message-ID: References: <20221104142345.1562750-1-thierry.reding@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="HZeBpEYEJWldW/UB" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/2.2.8 (2022-11-05) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org --HZeBpEYEJWldW/UB Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Nov 08, 2022 at 03:10:01PM +0100, Linus Walleij wrote: > On Fri, Nov 4, 2022 at 3:23 PM Thierry Reding = wrote: >=20 > > From: Thierry Reding > > > > This patch series changes the pin controller DT description on Tegra194 > > in order to properly describe how the hardware works. Currently a > > simplified description is used that merges two pin controller instances > > (called AON and main) into a single DT node. This has some disadvantages > > such as creating a complicated mapping between the pins in those pin > > controllers and the corresponding GPIO controllers (which are already > > separated). > > > > As a prerequisite, the first patch in this series converts the device > > tree bindings to json-schema. A second patch then adds an additional > > compatible string for the AON instance (along with more details about > > each controller's pins) and finally patch 3 converts the driver to > > cope with these changes. A fourth patch makes the corresponding > > changes in the Tegra194 DTS file. > > > > Note that while this changes the DT node in an incompatible way, this > > doesn't have any practical implications for backwards-compatibility. The > > reason for this is that device trees have only reconfigured a very > > narrow subset of pins of the main controller, so the new driver will > > remain backwards-compatible with old device trees. > > > > Changes in v3: > > - address more review comments by Rob Herring and make validation work >=20 > This looks good to me! >=20 > I tried to apply them to the pinctrl devel branch but this happens: >=20 > $ git am --signoff > ./v3_20221104_thierry_reding_pinctrl_tegra_separate_tegra194_instances.mbx > Applying: dt-bindings: pinctrl: tegra: Convert to json-schema > error: Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.yaml: > does not exist in index > Patch failed at 0001 dt-bindings: pinctrl: tegra: Convert to json-schema >=20 > I guess there are some prerequisites? Yeah, I noticed the same thing as I was just testing to cherry-pick just the first three patches to a vanilla upstream branch. So yes, that pre- requisite is another json-schema conversion that I have in my tree but which hasn't been merged yet. The good news is that my testing confirms what I recollect about the DT backwards-compatibility not being an issue. In practice the only pins =66rom this that are being used are in the first controller, so if we change the driver to only take control of one of them, the second will be ignored and that's really a no-op. What that also implies is that the pinctrl driver patch is completely standalone, so you can apply that whenever you want and I can apply the DT patch to the Tegra tree. I can then also pick up the DT bindings patches and resolve the conflict there. That is, if you don't mind. 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