From: Conor Dooley <conor@kernel.org>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: Conor Dooley <conor.dooley@microchip.com>,
Thierry Reding <thierry.reding@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Daire McNamara <daire.mcnamara@microchip.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pwm@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v11 3/4] pwm: add microchip soft ip corePWM driver
Date: Tue, 8 Nov 2022 18:32:35 +0000 [thread overview]
Message-ID: <Y2qgw2wAezkHSgg5@spud> (raw)
In-Reply-To: <20221108155041.t4oppot5wy77jzgd@pengutronix.de>
On Tue, Nov 08, 2022 at 04:50:41PM +0100, Uwe Kleine-König wrote:
> Hello,
Hello! Thanks for the review Uwe :)
> On Fri, Oct 07, 2022 at 12:35:12PM +0100, Conor Dooley wrote:
> > +static int mchp_core_pwm_apply_locked(struct pwm_chip *chip, struct pwm_device *pwm,
> > + const struct pwm_state *state)
> > +{
> > + struct mchp_core_pwm_chip *mchp_core_pwm = to_mchp_core_pwm(chip);
> > + struct pwm_state current_state = pwm->state;
> > + bool period_locked;
> > + u64 duty_steps;
> > + u16 prescale;
> > + u8 period_steps;
> > +
> > + if (!state->enabled) {
> > + mchp_core_pwm_enable(chip, pwm, false, current_state.period);
> > + return 0;
> > + }
> > +
> > + /*
> > + * If the only thing that has changed is the duty cycle or the polarity,
> > + * we can shortcut the calculations and just compute/apply the new duty
> > + * cycle pos & neg edges
> > + * As all the channels share the same period, do not allow it to be
> > + * changed if any other channels are enabled.
> > + * If the period is locked, it may not be possible to use a period
> > + * less than that requested. In that case, we just abort.
> > + */
> > + period_locked = mchp_core_pwm->channel_enabled & ~(1 << pwm->hwpwm);
> > +
> > + if (period_locked) {
> > + u16 hw_prescale;
> > + u8 hw_period_steps;
> > +
> > + mchp_core_pwm_calc_period(chip, state, &prescale, &period_steps);
> > + hw_prescale = readb_relaxed(mchp_core_pwm->base + MCHPCOREPWM_PRESCALE);
> > + hw_period_steps = readb_relaxed(mchp_core_pwm->base + MCHPCOREPWM_PERIOD);
> > +
> > + if ((period_steps + 1) * (prescale + 1) <
> > + (hw_period_steps + 1) * (hw_prescale + 1))
> > + return -EINVAL;
> > +
> > + /*
> > + * It is possible that something could have set the period_steps
> > + * register to 0xff, which would prevent us from setting a 100%
> > + * or 0% relative duty cycle, as explained above in
> > + * mchp_core_pwm_calc_period().
> > + * The period is locked and we cannot change this, so we abort.
> > + */
> > + if (hw_period_steps == MCHPCOREPWM_PERIOD_STEPS_MAX)
> > + return -EINVAL;
> > +
> > + prescale = hw_prescale;
> > + period_steps = hw_period_steps;
> > + } else {
> > + int ret;
> > +
> > + ret = mchp_core_pwm_calc_period(chip, state, &prescale, &period_steps);
> > + if (ret)
> > + return ret;
> > +
> > + mchp_core_pwm_apply_period(mchp_core_pwm, prescale, period_steps);
> > + }
> > +
> > + duty_steps = mchp_core_pwm_calc_duty(chip, pwm, state, prescale, period_steps);
>
> Both mchp_core_pwm_calc_period and mchp_core_pwm_calc_duty call
> clk_get_rate(), I suggest call this only once and pass the rate to these
> two functions.
Sure. I think the signatures of both of those functions could be reduced
in the process which would be nice.
> Both branches of the if above start with calling
> mchp_core_pwm_calc_period, this could be simplified, too.
ret = mchp_core_pwm_calc_period(chip, state, &prescale, &period_steps);
if (ret)
return ret;
period_locked = mchp_core_pwm->channel_enabled & ~(1 << pwm->hwpwm);
if (period_locked) {
u16 hw_prescale;
u8 hw_period_steps;
hw_prescale = readb_relaxed(mchp_core_pwm->base + MCHPCOREPWM_PRESCALE);
hw_period_steps = readb_relaxed(mchp_core_pwm->base + MCHPCOREPWM_PERIOD);
if ((period_steps + 1) * (prescale + 1) <
(hw_period_steps + 1) * (hw_prescale + 1))
return -EINVAL;
/*
* It is possible that something could have set the period_steps
* register to 0xff, which would prevent us from setting a 100%
* or 0% relative duty cycle, as explained above in
* mchp_core_pwm_calc_period().
* The period is locked and we cannot change this, so we abort.
*/
if (hw_period_steps == MCHPCOREPWM_PERIOD_STEPS_MAX)
return -EINVAL;
prescale = hw_prescale;
period_steps = hw_period_steps;
} else {
mchp_core_pwm_apply_period(mchp_core_pwm, prescale, period_steps);
}
duty_steps = mchp_core_pwm_calc_duty(chip, pwm, state, prescale, period_steps);
I'll aim for something like the (absolutely untested) above then when I
respin.
> (Hmm, in
> exactly one of them you check the return code, wouldn't that be sensible
> for both callers?)
Been messing with rust a bit of late, I love the #[must_use] attribute.
Looks to be an oversight since it's only going to return an error if the
clock rate exceeds what the FPGA is actually capable of.
Thanks again,
Conor.
next prev parent reply other threads:[~2022-11-08 18:32 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-07 11:35 [PATCH v11 0/4] Microchip soft ip corePWM driver Conor Dooley
2022-10-07 11:35 ` [PATCH v11 1/4] dt-bindings: pwm: fix microchip corePWM's pwm-cells Conor Dooley
2022-10-07 11:35 ` [PATCH v11 2/4] riscv: dts: fix the icicle's #pwm-cells Conor Dooley
2022-10-07 11:35 ` [PATCH v11 3/4] pwm: add microchip soft ip corePWM driver Conor Dooley
2022-11-08 15:50 ` Uwe Kleine-König
2022-11-08 18:32 ` Conor Dooley [this message]
2022-10-07 11:35 ` [PATCH v11 4/4] MAINTAINERS: add pwm to PolarFire SoC entry Conor Dooley
2022-11-09 9:35 ` Uwe Kleine-König
2022-11-09 10:47 ` Conor Dooley
2022-11-09 21:52 ` (subset) [PATCH v11 0/4] Microchip soft ip corePWM driver Conor Dooley
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Y2qgw2wAezkHSgg5@spud \
--to=conor@kernel.org \
--cc=conor.dooley@microchip.com \
--cc=daire.mcnamara@microchip.com \
--cc=devicetree@vger.kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pwm@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=robh+dt@kernel.org \
--cc=thierry.reding@gmail.com \
--cc=u.kleine-koenig@pengutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).