From: Conor Dooley <conor.dooley@microchip.com>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: Thierry Reding <thierry.reding@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Daire McNamara <daire.mcnamara@microchip.com>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-pwm@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v11 4/4] MAINTAINERS: add pwm to PolarFire SoC entry
Date: Wed, 9 Nov 2022 10:47:40 +0000 [thread overview]
Message-ID: <Y2uFTM/O0b39greO@wendy> (raw)
In-Reply-To: <20221109093525.kx4tyvha7y3sikxw@pengutronix.de>
On Wed, Nov 09, 2022 at 10:35:25AM +0100, Uwe Kleine-König wrote:
> On Fri, Oct 07, 2022 at 12:35:13PM +0100, Conor Dooley wrote:
> > Add the newly introduced pwm driver to the existing PolarFire SoC entry.
> >
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>
> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
>
> I assume you will rework the series and resend this one with the driver
> patche. Applying patch #4 alone doesn't make sense, so I'm marking this
> one as "changes requested", too, in the PWM patchwork instance.
>
> IMHO patches #1 and #2 make sense to be applied already without the
> driver given the binding is already there. I assume they will go in via
> the riscv tree, so I will mark these two as "handled elsewhere".
Right. Makes sense to me - I'll take the dt-binding & the dt via the
riscv (or soc, we're changing things up there [a]) tree.
Thanks,
Conor.
[a] - https://lore.kernel.org/linux-riscv/mhng-e4210f56-fcc3-4db8-abdb-d43b3ebe695d@palmer-ri-x1c9a/
next prev parent reply other threads:[~2022-11-09 10:48 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-07 11:35 [PATCH v11 0/4] Microchip soft ip corePWM driver Conor Dooley
2022-10-07 11:35 ` [PATCH v11 1/4] dt-bindings: pwm: fix microchip corePWM's pwm-cells Conor Dooley
2022-10-07 11:35 ` [PATCH v11 2/4] riscv: dts: fix the icicle's #pwm-cells Conor Dooley
2022-10-07 11:35 ` [PATCH v11 3/4] pwm: add microchip soft ip corePWM driver Conor Dooley
2022-11-08 15:50 ` Uwe Kleine-König
2022-11-08 18:32 ` Conor Dooley
2022-10-07 11:35 ` [PATCH v11 4/4] MAINTAINERS: add pwm to PolarFire SoC entry Conor Dooley
2022-11-09 9:35 ` Uwe Kleine-König
2022-11-09 10:47 ` Conor Dooley [this message]
2022-11-09 21:52 ` (subset) [PATCH v11 0/4] Microchip soft ip corePWM driver Conor Dooley
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Y2uFTM/O0b39greO@wendy \
--to=conor.dooley@microchip.com \
--cc=daire.mcnamara@microchip.com \
--cc=devicetree@vger.kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pwm@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=robh+dt@kernel.org \
--cc=thierry.reding@gmail.com \
--cc=u.kleine-koenig@pengutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).