From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3E68DC433FE for ; Thu, 10 Nov 2022 10:01:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229629AbiKJKBD (ORCPT ); Thu, 10 Nov 2022 05:01:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229503AbiKJKBC (ORCPT ); Thu, 10 Nov 2022 05:01:02 -0500 Received: from mail.skyhub.de (mail.skyhub.de [IPv6:2a01:4f8:190:11c2::b:1457]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C46ADCE2F; Thu, 10 Nov 2022 02:01:01 -0800 (PST) Received: from zn.tnic (p200300ea9733e7bc329c23fffea6a903.dip0.t-ipconnect.de [IPv6:2003:ea:9733:e7bc:329c:23ff:fea6:a903]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id 6A9271EC0426; Thu, 10 Nov 2022 11:01:00 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1668074460; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=qZLXTtpA1Whwf1t0A6omRWQRil+5S74v46bMvxAKPo4=; b=NPtpHBAaQFegJtsia1UPWxLljSjp29cTCXI+PVAw2YeogcZHsoMha0ABDbHkAbsQlu2Vlp 3Tqao2E2kUN4ltgjQa/L821C0B5aBOBvfq+GEVRfZahwcS6HlGrSIz8LqLyUIB23z3JTTv kqldIAUS3l3Cx+u/4tDvER3wvgFYWpw= Date: Thu, 10 Nov 2022 11:01:00 +0100 From: Borislav Petkov To: Krzysztof Kozlowski Cc: linux-edac@vger.kernel.org, Shubhrajyoti Datta , devicetree@vger.kernel.org, tony.luck@intel.com, mchehab@kernel.org, michal.simek@xilinx.com, git@amd.com, robh+dt@kernel.org, james.morse@arm.com, rric@kernel.org Subject: Re: (subset) [PATCH v2 1/2] dt-bindings: edac: Add bindings for Xilinx Versal EDAC for DDRMC Message-ID: References: <20221107062413.9642-1-shubhrajyoti.datta@amd.com> <20221107062413.9642-2-shubhrajyoti.datta@amd.com> <166807145377.16822.15787804198836912482.b4-ty@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <166807145377.16822.15787804198836912482.b4-ty@linaro.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Nov 10, 2022 at 10:10:56AM +0100, Krzysztof Kozlowski wrote: > On Mon, 7 Nov 2022 11:54:12 +0530, Shubhrajyoti Datta wrote: > > Add device tree bindings for Xilinx Versal EDAC for DDR > > controller. > > > > > > Applied, thanks! If you apply them then I need to merge your tree so that there are no checkpatch warnings about missing devicetree documentation and bla. How about you ACK them and I take them through the EDAC tree after proper review? Thx. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette