From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64796C433FE for ; Wed, 16 Nov 2022 13:35:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233318AbiKPNe7 (ORCPT ); Wed, 16 Nov 2022 08:34:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49762 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233072AbiKPNez (ORCPT ); Wed, 16 Nov 2022 08:34:55 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C729A6308; Wed, 16 Nov 2022 05:34:54 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 620C461DF3; Wed, 16 Nov 2022 13:34:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BAF30C433D6; Wed, 16 Nov 2022 13:34:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668605693; bh=zlY4mrIv0s5cE8xdBAeTBqSjaL9Tl9EQS+raR3pCQ2A=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=AYQqBhcDXeEq2QL2JmFHGJK3Tj4P9EKXRaACb5i3uhghyscPxmFiZEQ8+nlhhWVR0 GUhOk8J2YSZcsOAoevlc3MkgR9TLSrfB0CXPcRo41NjJ/v5oHSxyypEUcLNPeOFrwX StXcGyTnOy8++FMmkG4OVTGQGXwH1HhY/Q43zyqh/yB5KgfAow+/sKuOnW6gC/ioGo Uch2eUL14/+f5d3Qxo6tDM+fys7daoYB+bDO+9QkQ9VcOG+p5HW1QnUNJNREOAy6oV cTdd0WMJZ+LUGV1x3MSybJSVA/N3AeWd2N9P279nHycdAUY0IxirZEU8NERnqLUHXv 9L9+CSHzIzxqg== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1ovIYZ-0002cK-Ts; Wed, 16 Nov 2022 14:34:23 +0100 Date: Wed, 16 Nov 2022 14:34:23 +0100 From: Johan Hovold To: Abel Vesa Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Bjorn Helgaas , Manivannan Sadhasivam , Lorenzo Pieralisi , Rob Herring , kw@linux.com, Krzysztof Kozlowski , Linux Kernel Mailing List , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org Subject: Re: [PATCH 1/2] dt-bindings: PCI: qcom: Add SM8550 to binding Message-ID: References: <20221116123505.2760397-1-abel.vesa@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221116123505.2760397-1-abel.vesa@linaro.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Wed, Nov 16, 2022 at 02:35:04PM +0200, Abel Vesa wrote: > Add the SM8550 platform to the binding. > > Signed-off-by: Abel Vesa > --- > .../devicetree/bindings/pci/qcom,pcie.yaml | 96 +++++++++++++++++++ > 1 file changed, 96 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > index 54f07852d279..efa01a8411c4 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -34,6 +34,8 @@ properties: > - qcom,pcie-sm8250 > - qcom,pcie-sm8450-pcie0 > - qcom,pcie-sm8450-pcie1 > + - qcom,pcie-sm8550-pcie0 > + - qcom,pcie-sm8550-pcie1 You should only need one compatible even if there are differences in which bus clocks you need to enable. > - qcom,pcie-ipq6018 > > reg: > @@ -92,6 +94,10 @@ properties: > power-domains: > maxItems: 1 > > + enable-gpios: > + description: GPIO controlled connection to ENABLE# signal > + maxItems: 1 > + > perst-gpios: > description: GPIO controlled connection to PERST# signal > maxItems: 1 > @@ -187,6 +193,8 @@ allOf: > - qcom,pcie-sm8250 > - qcom,pcie-sm8450-pcie0 > - qcom,pcie-sm8450-pcie1 > + - qcom,pcie-sm8550-pcie0 > + - qcom,pcie-sm8550-pcie1 > then: > properties: > reg: > @@ -601,6 +609,92 @@ allOf: > items: > - const: pci # PCIe core reset > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,pcie-sm8550-pcie0 > + then: > + properties: > + clocks: > + minItems: 11 > + maxItems: 11 > + clock-names: > + items: > + - const: pipe # PIPE clock > + - const: pipe_mux # PIPE MUX > + - const: phy_pipe # PIPE output clock The mux and pipe output does not belong in the binding and instead the muxing should be handled by the clock driver (cf. sc8280xp). You can probably drop the refclock too. > + - const: ref # REFERENCE clock > + - const: aux # Auxiliary clock > + - const: cfg # Configuration clock > + - const: bus_master # Master AXI clock > + - const: bus_slave # Slave AXI clock > + - const: slave_q2a # Slave Q2A clock > + - const: ddrss_sf_tbu # PCIe SF TBU clock > + - const: aggre0 # Aggre NoC PCIe0 AXI clock Johan