Re: [PATCH v5 3/8] arm64: dts: ti: k3-j721s2-mcu-wakeup: Add support of OSPI

[Matt Ranostay <mranostay@ti.com>]

On Wed, Nov 16, 2022 at 02:03:25PM +0530, Vaishnav Achath wrote:
> 
> 
> On 03/11/22 10:11, Matt Ranostay wrote:
> > From: Aswath Govindraju <a-govindraju@ti.com>
> > 
> > Add support for two instance of OSPI in J721S2 SoC.
> > 
> > Cc: Vignesh Raghavendra <vigneshr@ti.com>
> > Cc: Nishanth Menon <nm@ti.com>
> > Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
> > Signed-off-by: Matt Ranostay <mranostay@ti.com>
> > ---
> >  .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi     | 40 +++++++++++++++++++
> >  1 file changed, 40 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
> > index 3264b8e8faea..034122be2ed5 100644
> > --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
> > +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
> > @@ -306,4 +306,44 @@ cpts@3d000 {
> >  			ti,cpts-periodic-outputs = <2>;
> >  		};
> >  	};
> > +
> > +	fss: syscon@47000000 {
> > +		compatible = "syscon", "simple-mfd";
> 
> Looks like the update here to add "ti,j721e-system-controller" compatible is in
> PATCH 6/8, it could have been in the same patch here instead of editing the same
> node again in the series.
> 

Will fix in next revision.

- Matt


> > +		reg = <0x0 0x47000000 0x0 0x100>;
> > +		#address-cells = <2>;
> > +		#size-cells = <2>;
> > +		ranges;
> > +
> > +		ospi0: spi@47040000 {
> > +			compatible = "ti,am654-ospi", "cdns,qspi-nor";
> > +			reg = <0x00 0x47040000 0x00 0x100>,
> > +			      <0x5 0x0000000 0x1 0x0000000>;
> > +			interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>;
> > +			cdns,fifo-depth = <256>;
> > +			cdns,fifo-width = <4>;
> > +			cdns,trigger-address = <0x0>;
> > +			clocks = <&k3_clks 109 5>;
> > +			assigned-clocks = <&k3_clks 109 5>;
> > +			assigned-clock-parents = <&k3_clks 109 7>;
> > +			assigned-clock-rates = <166666666>;
> > +			power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +		};
> > +
> > +		ospi1: spi@47050000 {
> > +			compatible = "ti,am654-ospi", "cdns,qspi-nor";
> > +			reg = <0x00 0x47050000 0x00 0x100>,
> > +			      <0x7 0x0000000 0x1 0x0000000>;
> > +			interrupts = <GIC_SPI 841 IRQ_TYPE_LEVEL_HIGH>;
> > +			cdns,fifo-depth = <256>;
> > +			cdns,fifo-width = <4>;
> > +			cdns,trigger-address = <0x0>;
> > +			clocks = <&k3_clks 110 5>;
> > +			power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +		};
> > +
> > +	};
> >  };
> 
> Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com>
> 
> -- 
> Regards,
> Vaishnav