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From: Conor Dooley <conor@kernel.org>
To: Hal Feng <hal.feng@starfivetech.com>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Ben Dooks <ben.dooks@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Linus Walleij <linus.walleij@linaro.org>,
	Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 4/8] dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC
Date: Fri, 18 Nov 2022 11:39:52 +0000	[thread overview]
Message-ID: <Y3dvCPP1g0LzzHFO@spud> (raw)
In-Reply-To: <Y3duiJguYE6VrVLP@spud>

On Fri, Nov 18, 2022 at 11:37:50AM +0000, Conor Dooley wrote:
> On Fri, Nov 18, 2022 at 09:17:10AM +0800, Hal Feng wrote:
> > From: Emil Renner Berthing <kernel@esmil.dk>
> > 
> > This cache controller is also used on the StarFive JH7110 SoC.
> 
> "... and configured identically to that of the FU740"?
> Anyways,
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Actually, after looking at the next patch - why can you not fall back to
the fu740 one since you appear to have the same configuration as it?

> > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> > Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> > ---
> >  .../devicetree/bindings/riscv/sifive,ccache0.yaml          | 7 ++++++-
> >  1 file changed, 6 insertions(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml
> > index bf3f07421f7e..262d1d49ce25 100644
> > --- a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml
> > +++ b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml
> > @@ -25,6 +25,7 @@ select:
> >            - sifive,ccache0
> >            - sifive,fu540-c000-ccache
> >            - sifive,fu740-c000-ccache
> > +          - starfive,jh7110-ccache
> >  
> >    required:
> >      - compatible
> > @@ -37,6 +38,7 @@ properties:
> >                - sifive,ccache0
> >                - sifive,fu540-c000-ccache
> >                - sifive,fu740-c000-ccache
> > +              - starfive,jh7110-ccache
> >            - const: cache
> >        - items:
> >            - const: microchip,mpfs-ccache
> > @@ -86,6 +88,7 @@ allOf:
> >              enum:
> >                - sifive,fu740-c000-ccache
> >                - microchip,mpfs-ccache
> > +              - starfive,jh7110-ccache
> >  
> >      then:
> >        properties:
> > @@ -105,7 +108,9 @@ allOf:
> >        properties:
> >          compatible:
> >            contains:
> > -            const: sifive,fu740-c000-ccache
> > +            enum:
> > +              - sifive,fu740-c000-ccache
> > +              - starfive,jh7110-ccache
> >  
> >      then:
> >        properties:
> > -- 
> > 2.38.1
> > 
> > 
> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2022-11-18 11:40 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-18  1:17 [PATCH v2 0/8] Basic device tree support for StarFive JH7110 RISC-V SoC Hal Feng
2022-11-18  1:17 ` [PATCH v2 1/8] dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive2 board Hal Feng
2022-11-18 11:31   ` Conor Dooley
2022-11-18 13:13   ` Krzysztof Kozlowski
2022-11-18 17:28   ` Emil Renner Berthing
     [not found]   ` <202211190418.2AJ4ImtE072425@SH1-CSMTP-DB111.sundns.com>
2022-11-24  1:57     ` Hal Feng
     [not found]   ` <202211190418.2AJ4IQjc072382@SH1-CSMTP-DB111.sundns.com>
2022-11-24  5:56     ` Hal Feng
2022-11-24  9:20       ` Emil Renner Berthing
2022-11-24  9:50         ` Hal Feng
2022-11-18  1:17 ` [PATCH v2 2/8] dt-bindings: timer: Add StarFive JH7110 clint Hal Feng
2022-11-18 11:32   ` Conor Dooley
2022-11-18  1:17 ` [PATCH v2 3/8] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Hal Feng
2022-11-18 11:32   ` Conor Dooley
2022-11-18  1:17 ` [PATCH v2 4/8] dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC Hal Feng
2022-11-18 11:37   ` Conor Dooley
2022-11-18 11:39     ` Conor Dooley [this message]
2022-11-22  8:40       ` Hal Feng
2022-11-22  9:07         ` Conor Dooley
2022-11-22  9:09           ` Ben Dooks
2022-11-22  9:55           ` Hal Feng
2022-11-22 10:01             ` Conor Dooley
2022-11-22 10:16               ` Hal Feng
2022-11-22 10:35                 ` Emil Renner Berthing
2022-11-22 12:51                   ` Hal Feng
2022-11-23 22:26                   ` Rob Herring
2022-11-18  1:17 ` [PATCH v2 5/8] soc: sifive: ccache: Add StarFive JH7110 support Hal Feng
2022-11-18 11:45   ` Conor Dooley
2022-11-22  9:02     ` Hal Feng
2022-11-22  9:54       ` Emil Renner Berthing
2022-11-22 10:12         ` Conor Dooley
2022-11-18 17:32   ` Emil Renner Berthing
2022-11-22  9:17     ` Hal Feng
2022-11-18  1:17 ` [PATCH v2 6/8] riscv: dts: starfive: Add initial StarFive JH7110 device tree Hal Feng
2022-11-18 12:01   ` Conor Dooley
2022-11-18 17:39     ` Emil Renner Berthing
2022-11-23  7:11     ` Hal Feng
2022-11-18 17:41   ` Emil Renner Berthing
2022-11-23  7:20     ` Hal Feng
2022-11-18  1:17 ` [PATCH v2 7/8] riscv: dts: starfive: Add StarFive JH7110 VisionFive2 board " Hal Feng
2022-11-18 17:55   ` Emil Renner Berthing
2022-11-24  6:17     ` Hal Feng
2022-11-18  1:17 ` [PATCH v2 8/8] RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW Hal Feng
2022-11-18 12:04   ` Conor Dooley
2022-12-02 18:00   ` Palmer Dabbelt
2022-12-02 18:07     ` Conor Dooley
2022-12-02 18:13       ` Palmer Dabbelt
2022-12-02 18:18         ` Conor Dooley
2022-12-02 18:24           ` Palmer Dabbelt
2022-12-02 18:43   ` Palmer Dabbelt
2022-12-04  7:20     ` Hal Feng
2022-11-18  7:28 ` [PATCH v2 0/8] Basic device tree support for StarFive JH7110 RISC-V SoC Hal Feng
2022-12-02 19:00 ` patchwork-bot+linux-riscv
2022-12-02 19:04   ` Palmer Dabbelt

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