devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Conor Dooley <conor@kernel.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	William Qiu <william.qiu@starfivetech.com>
Cc: William Qiu <william.qiu@starfivetech.com>,
	linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-mmc@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Jaehoon Chung <jh80.chung@samsung.com>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 3/3] riscv: dts: starfive: Add mmc node
Date: Wed, 7 Dec 2022 16:31:03 +0000	[thread overview]
Message-ID: <Y5C/x80p8+6Tosk/@spud> (raw)
In-Reply-To: <c0b84752-443f-d935-0ed8-c8ed4d212c2e@linaro.org>

[-- Attachment #1: Type: text/plain, Size: 4324 bytes --]

On Wed, Dec 07, 2022 at 04:14:53PM +0100, Krzysztof Kozlowski wrote:
> On 07/12/2022 14:17, William Qiu wrote:
> > This adds the mmc node for the StarFive JH7110 SoC.
> > Set sdioo node to emmc and set sdio1 node to sd.
> > 
> > Signed-off-by: William Qiu <william.qiu@starfivetech.com>
> > ---
> >  .../jh7110-starfive-visionfive-v2.dts         | 25 ++++++++++++
> >  arch/riscv/boot/dts/starfive/jh7110.dtsi      | 38 +++++++++++++++++++
> >  2 files changed, 63 insertions(+)
> > 
> > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts
> > index c8946cf3a268..6ef8e303c2e6 100644
> > --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts
> > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts
> > @@ -47,6 +47,31 @@ &clk_rtc {
> >  	clock-frequency = <32768>;
> >  };
> >  
> > +&sdio0 {
> > +	max-frequency = <100000000>;
> > +	card-detect-delay = <300>;
> > +	bus-width = <8>;
> > +	cap-mmc-highspeed;
> > +	mmc-ddr-1_8v;
> > +	mmc-hs200-1_8v;
> > +	non-removable;
> > +	cap-mmc-hw-reset;
> > +	post-power-on-delay-ms = <200>;
> > +	status = "okay";
> > +};
> > +
> > +&sdio1 {
> > +	max-frequency = <100000000>;
> > +	card-detect-delay = <300>;
> > +	bus-width = <4>;
> > +	no-sdio;
> > +	no-mmc;
> > +	broken-cd;
> > +	cap-sd-highspeed;
> > +	post-power-on-delay-ms = <200>;
> > +	status = "okay";
> > +};
> > +
> >  &gmac0_rmii_refin {
> >  	clock-frequency = <50000000>;
> >  };
> > diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> > index c22e8f1d2640..e90b085d7e41 100644
> > --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> > +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> > @@ -331,6 +331,11 @@ aoncrg: clock-controller@17000000 {
> >  			#reset-cells = <1>;
> >  		};
> >  
> > +		sys_syscon: sys_syscon@13030000 {
> 
> No underscores in node names, generic node names (syscon or
> system-controller)
> 
> > +			compatible = "syscon";
> 
> This is not allowed alone.
> 
> > +			reg = <0x0 0x13030000 0x0 0x1000>;
> > +		};
> > +
> >  		gpio: gpio@13040000 {
> >  			compatible = "starfive,jh7110-sys-pinctrl";
> >  			reg = <0x0 0x13040000 0x0 0x10000>;
> > @@ -433,5 +438,38 @@ uart5: serial@12020000 {
> >  			reg-shift = <2>;
> >  			status = "disabled";
> >  		};
> > +
> > +		/* unremovable emmc as mmcblk0 */
> > +		sdio0: mmc@16010000 {
> > +			compatible = "starfive,jh7110-sdio";
> > +			reg = <0x0 0x16010000 0x0 0x10000>;
> > +			clocks = <&syscrg JH7110_SYSCLK_SDIO0_AHB>,
> > +				 <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
> > +			clock-names = "biu","ciu";
> > +			resets = <&syscrg JH7110_SYSRST_SDIO0_AHB>;
> > +			reset-names = "reset";
> > +			interrupts = <74>;
> > +			fifo-depth = <32>;
> > +			fifo-watermark-aligned;
> > +			data-addr = <0>;
> > +			starfive,sys-syscon = <&sys_syscon 0x14 0x1a 0x7c000000>;
> 
> This does not match your bindings at all. "&sys_syscon" is a phandle,
> not a number of tuning retries, as you expect in your bindings.

Additionally, a Link: to the documentation for where-ever these "random"
numbers that are being used would be nice.

+static int dw_mci_starfive_parse_dt(struct dw_mci *host)
+{
+	struct of_phandle_args args;
+	struct starfive_priv *priv;
+	int ret;
+
+	priv = devm_kzalloc(host->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	ret = of_parse_phandle_with_fixed_args(host->dev->of_node,
+						"starfive,sys-syscon", 3, 0, &args);
+	if (ret) {
+		dev_err(host->dev, "Failed to parse starfive,sys-syscon\n");
+		return -EINVAL;
+	}
+
+	priv->reg_syscon = syscon_node_to_regmap(args.np);
+	of_node_put(args.np);
+	if (IS_ERR(priv->reg_syscon))
+		return PTR_ERR(priv->reg_syscon);
+
+	priv->syscon_offset = args.args[0];
+	priv->syscon_shift  = args.args[1];
+	priv->syscon_mask   = args.args[2];

Given the driver, the property description just seems incorrect and this
is actually the bit of the syscon that is relevant to the tuning process
(perhaps where the find the tuning values?). Without public docs or a
better description it is hard for (me at least) to know :)

+
+	host->priv = priv;
+
+	return 0;
+}

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

  reply	other threads:[~2022-12-07 16:31 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-07 13:17 [PATCH v1 0/3] StarFive's SDIO/eMMC driver support William Qiu
2022-12-07 13:17 ` [PATCH v1 1/3] dt-bindings: mmc: Add bindings for StarFive William Qiu
2022-12-07 14:19   ` Rob Herring
2022-12-07 14:46     ` Conor Dooley
2022-12-08  8:38       ` William Qiu
2022-12-08  8:34     ` William Qiu
2022-12-07 15:13   ` Krzysztof Kozlowski
2022-12-08  8:44     ` William Qiu
2022-12-08  9:01       ` Krzysztof Kozlowski
2022-12-08 10:02         ` William Qiu
2022-12-08 21:13   ` Linus Walleij
2022-12-09 11:18     ` William Qiu
2022-12-07 13:17 ` [PATCH v1 2/3] mmc: starfive: Add sdio/emmc driver support William Qiu
2022-12-08 21:09   ` Linus Walleij
2022-12-09 11:26     ` William Qiu
2023-02-02 11:09     ` William Qiu
2023-02-02 12:51       ` Linus Walleij
2022-12-13  2:24   ` Shawn Lin
2022-12-13  7:21     ` William Qiu
2022-12-13  7:33       ` Shawn Lin
2022-12-13  7:38         ` William Qiu
2022-12-07 13:17 ` [PATCH v1 3/3] riscv: dts: starfive: Add mmc node William Qiu
2022-12-07 15:14   ` Krzysztof Kozlowski
2022-12-07 16:31     ` Conor Dooley [this message]
2022-12-08  9:57       ` William Qiu
2022-12-08  9:46     ` William Qiu
2022-12-08 21:15   ` Linus Walleij
2022-12-09 11:31     ` William Qiu
2023-01-16 10:13     ` William Qiu
2022-12-16  2:02 ` [PATCH v1 0/3] StarFive's SDIO/eMMC driver support William Qiu
2022-12-16  9:22   ` Ulf Hansson
2022-12-16  9:26     ` William Qiu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=Y5C/x80p8+6Tosk/@spud \
    --to=conor@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=jh80.chung@samsung.com \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=krzysztof.kozlowski@linaro.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mmc@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=robh+dt@kernel.org \
    --cc=ulf.hansson@linaro.org \
    --cc=william.qiu@starfivetech.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).