From: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
To: Tomer Maimon <tmaimon77@gmail.com>
Cc: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>,
linux-clk@vger.kernel.org, openbmc@lists.ozlabs.org,
linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org,
devicetree@vger.kernel.org,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Avi Fishman" <avifishman70@gmail.com>,
"Tali Perry" <tali.perry1@gmail.com>,
"Patrick Venture" <venture@google.com>,
"Nancy Yuen" <yuenn@google.com>,
"Benjamin Fair" <benjaminfair@google.com>,
"Daniel Lezcano" <daniel.lezcano@linaro.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Wim Van Sebroeck" <wim@linux-watchdog.org>,
"Guenter Roeck" <linux@roeck-us.net>
Subject: Re: [PATCH v5 5/6] clk: wpcm450: Add Nuvoton WPCM450 clock/reset controller driver
Date: Tue, 13 Dec 2022 15:53:54 +0100 [thread overview]
Message-ID: <Y5iSAmJimekv1vkZ@probook> (raw)
In-Reply-To: <CAP6Zq1hjbPpLMWST4cYyMQw_-jewFoSrudOC+FPP5qOxJz4=xw@mail.gmail.com>
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On Mon, Dec 12, 2022 at 09:30:46AM +0200, Tomer Maimon wrote:
> Hi Jonathan,
>
> Thanks for your patch, and sorry for the late reply.
>
> On Fri, 4 Nov 2022 at 18:19, Jonathan Neuschäfer <j.neuschaefer@gmx.net> wrote:
[...]
> > diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> > index de176c2fbad96..de5662830fce8 100644
> > --- a/drivers/reset/Kconfig
> > +++ b/drivers/reset/Kconfig
> > @@ -208,7 +208,7 @@ config RESET_SCMI
> >
> > config RESET_SIMPLE
> > bool "Simple Reset Controller Driver" if COMPILE_TEST || EXPERT
> > - default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC
> > + default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC || ARCH_NPCM
> Please modify the default ARCH_NPCM to the specific Hermon use,
> ARCH_WPCM450, since NPCM7XX and NPCM8XX use a specific NPCM reset
> driver.
> https://elixir.bootlin.com/linux/v6.1-rc8/source/drivers/reset/reset-npcm.c
> we prefer not to have two reset drivers when compiling ARCH_NPCM.
Good point. I'll fix that.
Thanks,
J.
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next prev parent reply other threads:[~2022-12-13 14:54 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-04 16:18 [PATCH v5 0/6] Nuvoton WPCM450 clock and reset driver Jonathan Neuschäfer
2022-11-04 16:18 ` [PATCH v5 1/6] dt-bindings: timer: nuvoton,npcm7xx-timer: Allow specifying all clocks Jonathan Neuschäfer
2022-11-04 16:18 ` [PATCH v5 2/6] clocksource: timer-npcm7xx: Enable timer 1 clock before use Jonathan Neuschäfer
2022-11-04 16:18 ` [PATCH v5 3/6] dt-bindings: clock: Add Nuvoton WPCM450 clock/reset controller Jonathan Neuschäfer
2022-12-09 20:21 ` Stephen Boyd
2023-04-12 19:13 ` Jonathan Neuschäfer
2023-04-12 20:34 ` Stephen Boyd
2023-04-12 21:24 ` Jonathan Neuschäfer
2022-11-04 16:18 ` [PATCH v5 4/6] ARM: dts: wpcm450: Add clock controller node Jonathan Neuschäfer
2022-11-04 16:18 ` [PATCH v5 5/6] clk: wpcm450: Add Nuvoton WPCM450 clock/reset controller driver Jonathan Neuschäfer
2022-12-09 20:21 ` Stephen Boyd
2022-12-12 7:30 ` Tomer Maimon
2022-12-13 14:53 ` Jonathan Neuschäfer [this message]
2022-11-04 16:18 ` [PATCH v5 6/6] [NOT FOR MERGE] ARM: dts: wpcm450: Switch clocks to clock controller Jonathan Neuschäfer
2022-11-22 1:40 ` [PATCH v5 0/6] Nuvoton WPCM450 clock and reset driver Joel Stanley
2022-11-22 8:09 ` Daniel Lezcano
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