From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DAAFBC4332F for ; Wed, 21 Dec 2022 13:17:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229612AbiLUNRD (ORCPT ); Wed, 21 Dec 2022 08:17:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234099AbiLUNRC (ORCPT ); Wed, 21 Dec 2022 08:17:02 -0500 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9174321898; Wed, 21 Dec 2022 05:17:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=nU5P7LyVQ3beqazjkGa/5BdKFxoYM9aSKA3nFZTk8DU=; b=51ZBAIiPhn8+my1KlwUrSE6x7b fOyvgm8qYYmddkQ0QD65fhhNZf97ZtMcsalpVwBVaJuH7rtnIDpu8qcDrMiqUNL2UP+8CLhjhKNpe cJOby3GN/Zk0CDS0zl4ETZAp9aSwSRmGywgKFUpQoGFOoi8t2ixa1HeHItZpNHVJoeH0=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1p7yxm-000BDz-5x; Wed, 21 Dec 2022 14:16:50 +0100 Date: Wed, 21 Dec 2022 14:16:50 +0100 From: Andrew Lunn To: Biao Huang Cc: AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, macpaul.lin@mediatek.com Subject: Re: [RESEND PATCH v4] arm64: dts: mt8195: Add Ethernet controller Message-ID: References: <20221221022523.8458-1-biao.huang@mediatek.com> <20221221022523.8458-2-biao.huang@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221221022523.8458-2-biao.huang@mediatek.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org > +ð { > + phy-mode ="rgmii-rxid"; That is pretty unusual. You don't see rxid, or txid very often, it is normally rgmii, or rgmii-id. > + phy-handle = <ðernet_phy0>; > + snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>; > + snps,reset-delays-us = <0 10000 10000>; > + mediatek,tx-delay-ps = <2030>; How important is the 30 here? You appear to have the PHY doing the RX delay, and the MAC doing the TX delay. Normally we have the PHY do both. Can you actually do phy-mode = "rgmii-id", and mediatek,tx-delay-ps = <30> ? That would then have the PHY doing the basic 2ns delay, and the MAC doing the fine tuning needed for TX? Andrew