From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1CD4EC05027 for ; Mon, 23 Jan 2023 12:41:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231478AbjAWMlP (ORCPT ); Mon, 23 Jan 2023 07:41:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44412 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231130AbjAWMlN (ORCPT ); Mon, 23 Jan 2023 07:41:13 -0500 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1B47122A06 for ; Mon, 23 Jan 2023 04:40:42 -0800 (PST) Received: by mail-wr1-x429.google.com with SMTP id q5so6013954wrv.0 for ; Mon, 23 Jan 2023 04:40:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=ctAeXQbGKSAr1B5seFHr6bhqHo1rRPcfqpnpNIdRSEw=; b=dSYNRl/1AZPlEQ+oq+Bok/Twfn5pqPxxaDv+z7g32jqUmi6dzFvXp6bnVcSgboaiPJ BA1stF6sMQv0JWa9z31RM2cYAlfCB04LgKjlLtMzv9MU1ASnXfnG3duuAH8/5fqn4vw5 RlBy7DS58oLs47BD5b8dtlV6DyV4f7KfoO1bXi52YdyjHm7RzuFzPd/j5SEunFg0oeXk 0RVWTA/goJxYTPgS0yZ+7BlKkKR2/e8dtyjwU+M2OrJwz4i/uI/1bW1FXrNJJhr1uHiC hAt908nG4yryL4Y7KS4b+fLfQTDKwnZEbIslTQPHj/B1qn+zx/Ht7MFYlyf6tocL2Kgz Jntw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=ctAeXQbGKSAr1B5seFHr6bhqHo1rRPcfqpnpNIdRSEw=; b=4ZJg7Fu1SWWLR1K9GBZJWmsTwCiNcjqBFzdSwrKXaLPGAgs2CJFyGWzwGg7pVvSeoo 6V0bYlpKLq6H9WepmjHQ9N2XDgUTQBYH03r5uflCrAfegph8Ki4iHZiw9GB9CH9wN70f cikbCiVdJRi6IOtPrTtSHEKt704irG/KerNqV3gCP+VBI4r5Eo54/uGiFeapBqj6OH// PiZCViein5cTSlkEfBdmhYMVEISEODXl1ZmwloQbf9U3kqB1yNzAwYc6h5bNvV+PcHPX uL6zc/z6VWv9UrH4TlMO/BwH+wgJHFroJIDO2/Va7rV/qFmikwpppIO3CoX3V24Il5sU 5l/w== X-Gm-Message-State: AFqh2ko9EdgpX+H3efntwws7EjhcFXecWzaLQQQNRfuwSlvB7Qn1F7Ko goleJi6pMkYRI1IqZCZXsuLDlw== X-Google-Smtp-Source: AMrXdXvoHqDriOlhTDYKHtqiGtrdOZCXKaqWTI1V72XQvkzEKH3aMuwmWdY8AbmEPRnxUo/5it0SgA== X-Received: by 2002:adf:fa88:0:b0:2bd:feb5:fb7b with SMTP id h8-20020adffa88000000b002bdfeb5fb7bmr19753407wrr.33.1674477640638; Mon, 23 Jan 2023 04:40:40 -0800 (PST) Received: from linaro.org ([94.52.112.99]) by smtp.gmail.com with ESMTPSA id c8-20020a5d4148000000b002bdd21f25ebsm27744621wrq.71.2023.01.23.04.40.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Jan 2023 04:40:40 -0800 (PST) Date: Mon, 23 Jan 2023 14:40:39 +0200 From: Abel Vesa To: Johan Hovold Cc: Bjorn Andersson , Andy Gross , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64: dts: qcom: sm8550: fix USB-DP PHY resets Message-ID: References: <20230123101607.2413-1-johan+linaro@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230123101607.2413-1-johan+linaro@kernel.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 23-01-23 11:16:07, Johan Hovold wrote: > The USB-DP PHY resets have been switched. > > Fixes: 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes") > Signed-off-by: Johan Hovold Reviewed-by: Abel Vesa > --- > arch/arm64/boot/dts/qcom/sm8550.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > index 6ff135191ee0..2f453dc00852 100644 > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > @@ -2395,8 +2395,8 @@ usb_dp_qmpphy: phy@88e8000 { > > power-domains = <&gcc USB3_PHY_GDSC>; > > - resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, > - <&gcc GCC_USB3_PHY_PRIM_BCR>; > + resets = <&gcc GCC_USB3_PHY_PRIM_BCR>, > + <&gcc GCC_USB3_DP_PHY_PRIM_BCR>; > reset-names = "phy", "common"; > > #clock-cells = <1>; > -- > 2.39.1 >