RE: [PATCH v4 0/14] Add i.MX PCIe EP mode support

Hongxing Zhu
2023-01-16T02:02:48Z

Hi Lorenzo:

> -----Original Message-----
> From: Lorenzo Pieralisi <lpieralisi@kernel.org>
> Sent: 2023年1月14日 0:17
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: l.stach@pengutronix.de; bhelgaas@google.com; robh+dt@kernel.org;
> lorenzo.pieralisi@arm.com; shawnguo@kernel.org; kishon@ti.com;
> kw@linux.com; Frank Li <frank.li@nxp.com>; linux-pci@vger.kernel.org;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org; kernel@pengutronix.de; dl-linux-imx
> <linux-imx@nxp.com>
> Subject: Re: [PATCH v4 0/14] Add i.MX PCIe EP mode support
>
> On Tue, Nov 15, 2022 at 04:42:30AM +0000, Hongxing Zhu wrote:
> > Ping.
> > Almost one month pass away after this re-send of v4 series.
> > Any comments?
>
> Can you rebase on top of v6.2-rc1 and resend it please ? I will merge the dt
> bindings and PCI changes then.
>
Sure, I would send next version after rebase to v6.2-rc1.
Thanks a lot for your kindly help.

Best Regards
Richard Zhu

> Thanks,
> Lorenzo
>
> > Thanks.
> > Best Regards
> > Richard Zhu
> >
> > > -----Original Message-----
> > > From: Richard Zhu <hongxing.zhu@nxp.com>
> > > Sent: 2022年10月24日 16:06
> > > To: l.stach@pengutronix.de; bhelgaas@google.com; robh+dt@kernel.org;
> > > lorenzo.pieralisi@arm.com; shawnguo@kernel.org; kishon@ti.com;
> > > kw@linux.com; Frank Li <frank.li@nxp.com>
> > > Cc: Hongxing Zhu <hongxing.zhu@nxp.com>; linux-pci@vger.kernel.org;
> > > devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> > > linux-kernel@vger.kernel.org; kernel@pengutronix.de; dl-linux-imx
> > > <linux-imx@nxp.com>
> > > Subject: [PATCH v4 0/14] Add i.MX PCIe EP mode support
> > >
> > > i.MX PCIe controller is one dual mode PCIe controller, and can work
> > > either as RC or EP.
> > >
> > > This series add the i.MX PCIe EP mode support. And had been verified
> > > on i.MX8MQ, i.MX8MM EVK and i.MX8MP EVK boards.
> > >
> > > In the verification, one EVK board used as RC, the other one used as EP.
> > > Use the cross TX/RX differential cable connect the two PCIe ports of
> > > these two EVK boards.
> > >
> > > +-----------+ +------------+
> > > | PCIe TX |<-------------->|PCIe RX |
> > > | | | |
> > > |EVK Board | |EVK Board |
> > > | | | |
> > > | PCIe RX |<-------------->|PCIe TX |
> > > +-----------+ +------------+
> > >
> > > NOTE:
> > > Re-base to 6.1-rc1, and re-send the v4 series.
> > > BTW, the following PHY changes [1] is required when apply this series.
> > >
> > > [1]
> > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpa
> > >
> tchw%2F&data=05%7C01%7Chongxing.zhu%40nxp.com%7C5ccb28e3920441
> 0c3e76
> > >
> 08daf581a77c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6380
> 922344
> > >
> 55286842%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoi
> V2luMzI
> > >
> iLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=7F00u1UU
> 7PfxLw
> > > fBrIMPvLvLQT8ZJ6HOwkALiNsBJcI%3D&reserved=0
> > >
> ork.kernel.org%2Fproject%2Flinux-pci%2Fcover%2F1665625622-20551-1-gi
> > > t-s
> > >
> end-email-hongxing.zhu%40nxp.com%2F&amp;data=05%7C01%7Chongxing.z
> > >
> hu%40nxp.com%7C80b50b3789f9433f62e008dab5998a09%7C686ea1d3bc2b
> > >
> 4c6fa92cd99c5c301635%7C0%7C0%7C638021968298265067%7CUnknown%
> > >
> 7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwi
> > >
> LCJXVCI6Mn0%3D%7C3000%7C%7C%7C&amp;sdata=j70ORNKBvTCjWtJzS375
> > > TvuQfCGrVRQNbxS%2BhrGI0ZA%3D&amp;reserved=0
> > >
> > > Main changes from v3 -> v4:
> > > - Add the Rob's ACK in the dt-binding patch.
> > > - Use "i.MX" to keep spell consistent.
> > > - Squash generic endpoint infrastructure changes of
> > > "[12/14] PCI: imx6: Add iMX8MM PCIe EP mode" into Kconfig changes.
> > >
> > > Main changes from v2 -> v3:
> > > - Add the i.MX8MP PCIe EP support, and verified on i.MX8MP EVK board.
> > > - Rebase to latest pci/next branch(tag: v6.0-rc1 plus some PCIe changes).
> > >
> > > Main changes from v1 -> v2:
> > > - Add Rob's ACK into first two commits.
> > > - Rebase to the tag: pci-v5.20-changes of the pci/next branch.
> > >
> > > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 3 ++
> > > arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 14
> ++++++
> > > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 20
> > > +++++++++
> > > arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 13
> ++++++
> > > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 19
> > > ++++++++
> > > arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 12
> ++++++
> > > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 27
> > > ++++++++++++
> > > drivers/misc/pci_endpoint_test.c | 2 +
> > > drivers/pci/controller/dwc/Kconfig | 23
> > > +++++++++-
> > > drivers/pci/controller/dwc/pci-imx6.c | 200
> > >
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > > ++++++++++++++++--------
> > > 10 files changed, 314 insertions(+), 19 deletions(-)
> > >
> > > [RESEND v4 01/14] dt-bindings: imx6q-pcie: Add i.MX8MM PCIe EP mode
> > > [RESEND v4 02/14] dt-bindings: imx6q-pcie: Add i.MX8MQ PCIe EP mode
> > > [RESEND v4 03/14] dt-bindings: imx6q-pcie: Add i.MX8MP PCIe EP mode
> > > [RESEND v4 04/14] arm64: dts: Add i.MX8MM PCIe EP support [RESEND v4
> > > 05/14] arm64: dts: Add i.MX8MM PCIe EP support on EVK [RESEND v4
> > > 06/14]
> > > arm64: dts: Add i.MX8MQ PCIe EP support [RESEND v4 07/14] arm64: dts:
> > > Add i.MX8MQ PCIe EP support on EVK [RESEND v4 08/14] arm64: dts: Add
> > > i.MX8MP PCIe EP support [RESEND v4 09/14] arm64: dts: Add i.MX8MP
> > > PCIe EP support on EVK [RESEND v4 10/14] misc: pci_endpoint_test:
> > > Add i.MX8 PCIe EP device [RESEND v4 11/14] PCI: imx6: Add i.MX PCIe
> > > EP mode support [RESEND v4 12/14] PCI: imx6: Add i.MX8MQ PCIe EP
> > > support [RESEND v4 13/14] PCI: imx6: Add i.MX8MM PCIe EP support
> [RESEND v4 14/14] PCI: imx6:
> > > Add i.MX8MP PCIe EP support