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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id o135sm3414613ooo.38.2021.01.17.21.03.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Jan 2021 21:03:35 -0800 (PST) Date: Sun, 17 Jan 2021 23:03:33 -0600 From: Bjorn Andersson To: Jack Pham Cc: Vinod Koul , Kishon Vijay Abraham I , Andy Gross , Rob Herring , Wesley Cheng , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v2 1/4] dt-bindings: phy: qcom,qmp: Add SM8150, SM8250 and SM8350 USB PHY bindings Message-ID: References: <20210115174723.7424-1-jackp@codeaurora.org> <20210115174723.7424-2-jackp@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210115174723.7424-2-jackp@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Fri 15 Jan 11:47 CST 2021, Jack Pham wrote: > Add the compatible strings for the USB3 PHYs found on SM8150, SM8250 > and SM8350 SoCs. These require separate subschemas due to the different > required clock entries. > > Note the SM8150 and SM8250 compatibles have already been in place in > the dts as well as the driver implementation but were missing from > the documentation. > Reviewed-by: Bjorn Andersson Regards, Bjorn > Signed-off-by: Jack Pham > --- > .../devicetree/bindings/phy/qcom,qmp-phy.yaml | 67 +++++++++++++++++++ > 1 file changed, 67 insertions(+) > > diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml > index 390df23b82e7..841c72863b4f 100644 > --- a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml > @@ -30,15 +30,24 @@ properties: > - qcom,sdm845-qmp-ufs-phy > - qcom,sdm845-qmp-usb3-uni-phy > - qcom,sm8150-qmp-ufs-phy > + - qcom,sm8150-qmp-usb3-phy > + - qcom,sm8150-qmp-usb3-uni-phy > - qcom,sm8250-qmp-ufs-phy > - qcom,sm8250-qmp-gen3x1-pcie-phy > - qcom,sm8250-qmp-gen3x2-pcie-phy > - qcom,sm8250-qmp-modem-pcie-phy > + - qcom,sm8250-qmp-usb3-phy > + - qcom,sm8250-qmp-usb3-uni-phy > + - qcom,sm8350-qmp-usb3-phy > + - qcom,sm8350-qmp-usb3-uni-phy > - qcom,sdx55-qmp-usb3-uni-phy > > reg: > + minItems: 1 > + maxItems: 2 > items: > - description: Address and length of PHY's common serdes block. > + - description: Address and length of PHY's DP_COM control block. > > "#clock-cells": > enum: [ 1, 2 ] > @@ -287,6 +296,64 @@ allOf: > reset-names: > items: > - const: phy > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,sm8150-qmp-usb3-phy > + - qcom,sm8150-qmp-usb3-uni-phy > + - qcom,sm8250-qmp-usb3-uni-phy > + - qcom,sm8350-qmp-usb3-uni-phy > + then: > + properties: > + clocks: > + items: > + - description: Phy aux clock. > + - description: 19.2 MHz ref clk source. > + - description: 19.2 MHz ref clk. > + - description: Phy common block aux clock. > + clock-names: > + items: > + - const: aux > + - const: ref_clk_src > + - const: ref > + - const: com_aux > + resets: > + items: > + - description: reset of phy block. > + - description: phy common block reset. > + reset-names: > + items: > + - const: phy > + - const: common > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,sm8250-qmp-usb3-phy > + - qcom,sm8350-qmp-usb3-phy > + then: > + properties: > + clocks: > + items: > + - description: Phy aux clock. > + - description: 19.2 MHz ref clk. > + - description: Phy common block aux clock. > + clock-names: > + items: > + - const: aux > + - const: ref_clk_src > + - const: com_aux > + resets: > + items: > + - description: reset of phy block. > + - description: phy common block reset. > + reset-names: > + items: > + - const: phy > + - const: common > > examples: > - | > -- > 2.24.0 >