From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B5F6C47094 for ; Mon, 31 May 2021 06:09:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0492F610A6 for ; Mon, 31 May 2021 06:09:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230169AbhEaGKJ (ORCPT ); Mon, 31 May 2021 02:10:09 -0400 Received: from mail.kernel.org ([198.145.29.99]:51318 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230163AbhEaGKG (ORCPT ); Mon, 31 May 2021 02:10:06 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 01727610A6; Mon, 31 May 2021 06:08:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1622441304; bh=bJXekiCxbd47kWEfxPBA00RuulD8cPNLlN7HutDEhMo=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=aW4OsesDb9MyzcqB5y5T35wXfnhl7BCmrPVfKIguBswNnOK2BYzl1/L1q5QFiBSU7 MjQKMQ2yo7hP/cdMuaEAsZgPJ1WStYa9Kr911oFOsZTgjzqGgfE6xw5/SLe1uHL2ej eEli8/sQe4WZZSo8fl+Onr4K17JMx+fjRT51cexnxhZjIwJLbsJtE4YCyBfV96UQzi Q8RxkOtNQsVVmGNJ1gS5C9cA6PMaA6yml1huxKGccxbgBdDkRhiZu0Zf+uLsdOpv+M kIciViy7lDD9AtGIMkbpiMHBB7qzwIy5v+P9AhezuPJyZysowWcOwKx/JskZJbnaWz jKNR8G1LTj6Yg== Date: Mon, 31 May 2021 11:38:21 +0530 From: Vinod Koul To: Manivannan Sadhasivam Cc: kishon@ti.com, robh+dt@kernel.org, bjorn.andersson@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 0/3] Add support for PCIe PHY in SDX55 Message-ID: References: <20210427065400.18958-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210427065400.18958-1-manivannan.sadhasivam@linaro.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 27-04-21, 12:23, Manivannan Sadhasivam wrote: > Hi, > > This series adds support for PCIe PHY found in Qualcomm SDX55 platform. > The PHY version is v4.20 which has different register offsets compared with > previous v4.0x versions. So separate defines are introducted to handle the > differences. > > This series has been tested on Telit FN980 EVB with an out of tree PCIe Endpoint > driver. Applied, thanks I got a conflict on last patch as Dimitry has already added some defines in the header.. Pls check everything was applied cleanly Thanks -- ~Vinod