From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 291FAC48BDF for ; Thu, 24 Jun 2021 12:47:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0C624613F7 for ; Thu, 24 Jun 2021 12:47:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231453AbhFXMta (ORCPT ); Thu, 24 Jun 2021 08:49:30 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:41760 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231129AbhFXMt3 (ORCPT ); Thu, 24 Jun 2021 08:49:29 -0400 Received: from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 5A7724A1; Thu, 24 Jun 2021 14:47:09 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1624538829; bh=YK1V6EQP0xZzOKnqIihFqu4R7XbETZn4rERcj1Ng924=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=ISN6O21MlplTqx8PlNg2EPdOfJUUl6CxBd2f+k+OV22V4YNKHPcHYj2WOnAWVqvbg jnmBUEVhFuyO5XAE3xLBFW03f8s8hpfM9+YPFJ2C8bObVjL47X9NvNVQJPhprhYXBI yovCKFftL3DvXUWIHkTcVLuZopqb//J9kdU+F/LI= Date: Thu, 24 Jun 2021 15:46:39 +0300 From: Laurent Pinchart To: Jagan Teki Cc: Fabio Estevam , Michael Tretter , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Peng Fan , Francis Laniel , Matteo Lisi , Neil Armstrong , linux-amarula , linux-kernel , Robert Foss , Andrzej Hajda , DRI mailing list , Milco Pratesi , Anthony Brandon , linux-phy@lists.infradead.org, Fancy Fang , Shawn Guo , Sascha Hauer , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , NXP Linux Team Subject: Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver Message-ID: References: <20210621072424.111733-1-jagan@amarulasolutions.com> <20210621072424.111733-3-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Jun 24, 2021 at 06:02:36PM +0530, Jagan Teki wrote: > Hi Laurent, > > On Thu, Jun 24, 2021 at 5:48 PM Laurent Pinchart > wrote: > > > > Hi Jagan, > > > > On Thu, Jun 24, 2021 at 05:42:43PM +0530, Jagan Teki wrote: > > > On Thu, Jun 24, 2021 at 8:18 AM Fabio Estevam wrote: > > > > On Wed, Jun 23, 2021 at 7:23 PM Laurent Pinchart wrote: > > > > > > > > > Looking at the register set, it seems to match the Exynos 5433, > > > > > supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage > > > > > that driver instead of adding a new one for the same IP core ? > > > > > > > > Yes. there was an attempt from Michael in this direction: > > > > https://patchwork.kernel.org/project/dri-devel/cover/20200911135413.3654800-1-m.tretter@pengutronix.de/ > > > > > > Thanks for the reference, I will check it out and see I can send any > > > updated versions wrt my i.MX8MM platform. > > > > Thanks. > > > > I had a brief look at the exynos driver, and I think it should be turned > > into a DRM bridge as part of this rework to be used with the i.MX8MM. > > > > Is there someone from Samsung who could assist, at least to test the > > changes ? > > I have hardware to verify it on i.MX8MM but from exynos I don't have > any contact from Samsung to suggest or test. Maybe I can add Tomasz > Figa while sending the changes? Tomasz hasn't been working for Samsung for a loooong time (I've dropped his Samsung address from the CC list for this reason). > I understand that there are 2 key implementations. > > 1. Adjust the exynos_drm_dsi.c by dropping component_ops as i.MX8MM > flow with LCDIF doesn't have component_ops (make sure it works with > exynos platform first) I think it should be turned into a real drm_bridge, it's currently implemented based on drm_encoder. > 2. Sec DSIM Bridge driver common cross Exynos and i.MX8MM platform > drivers or only one Sec DSIM bridge driver to handle both the > platforms by differentiating compatible and driver data > > Any more suggestions would be appreciated? -- Regards, Laurent Pinchart