* [PATCH 0/1] Devicetree update for SDX65 platform
@ 2021-07-09 20:08 quic_vamslank
2021-07-09 20:08 ` [PATCH 1/1] ARM: dts: qcom: sdx65: Add pincontrol node quic_vamslank
0 siblings, 1 reply; 3+ messages in thread
From: quic_vamslank @ 2021-07-09 20:08 UTC (permalink / raw)
To: agross, robh+dt, bjorn.andersson, linus.walleij
Cc: linux-arm-msm, devicetree, linux-kernel, manivannan.sadhasivam,
Vamsi Krishna Lanka
From: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Hello,
This patch adds pincntrl node to SDX65 dts. This patch series depends on
the previous patch series which adds pinctrl support for SDX65 and
devicetree support for SDX65 Modem and MTP.
Thanks,
Vamsi
Vamsi krishna Lanka (1):
ARM: dts: qcom: sdx65: Add pincontrol node
arch/arm/boot/dts/qcom-sdx65.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
--
2.32.0
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 1/1] ARM: dts: qcom: sdx65: Add pincontrol node
2021-07-09 20:08 [PATCH 0/1] Devicetree update for SDX65 platform quic_vamslank
@ 2021-07-09 20:08 ` quic_vamslank
2021-07-10 3:12 ` Bjorn Andersson
0 siblings, 1 reply; 3+ messages in thread
From: quic_vamslank @ 2021-07-09 20:08 UTC (permalink / raw)
To: agross, robh+dt, bjorn.andersson, linus.walleij
Cc: linux-arm-msm, devicetree, linux-kernel, manivannan.sadhasivam,
Vamsi krishna Lanka
From: Vamsi krishna Lanka <quic_vamslank@quicinc.com>
This commit adds pincontrol node to SDX65 dts.
Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 4b5e7248c34d..155635d1de2f 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -96,6 +96,17 @@ blsp1_uart3: serial@831000 {
status = "disabled";
};
+ tlmm: pinctrl@f100000 {
+ compatible = "qcom,sdx65-pinctrl";
+ reg = <0xf100000 0x300000>;
+ interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&intc>;
+ #interrupt-cells = <2>;
+ };
+
pdc: interrupt-controller@b210000 {
compatible = "qcom,sdx65-pdc", "qcom,pdc";
reg = <0xb210000 0x10000>;
--
2.32.0
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH 1/1] ARM: dts: qcom: sdx65: Add pincontrol node
2021-07-09 20:08 ` [PATCH 1/1] ARM: dts: qcom: sdx65: Add pincontrol node quic_vamslank
@ 2021-07-10 3:12 ` Bjorn Andersson
0 siblings, 0 replies; 3+ messages in thread
From: Bjorn Andersson @ 2021-07-10 3:12 UTC (permalink / raw)
To: quic_vamslank
Cc: agross, robh+dt, linus.walleij, linux-arm-msm, devicetree,
linux-kernel, manivannan.sadhasivam
On Fri 09 Jul 15:08 CDT 2021, quic_vamslank@quicinc.com wrote:
> From: Vamsi krishna Lanka <quic_vamslank@quicinc.com>
>
> This commit adds pincontrol node to SDX65 dts.
>
> Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
> ---
> arch/arm/boot/dts/qcom-sdx65.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
> index 4b5e7248c34d..155635d1de2f 100644
> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi
> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
> @@ -96,6 +96,17 @@ blsp1_uart3: serial@831000 {
> status = "disabled";
> };
>
> + tlmm: pinctrl@f100000 {
> + compatible = "qcom,sdx65-pinctrl";
> + reg = <0xf100000 0x300000>;
> + interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + interrupt-parent = <&intc>;
> + #interrupt-cells = <2>;
You're missing gpio-ranges.
Please squash this with the other dts patch.
Thanks,
Bjorn
> + };
> +
> pdc: interrupt-controller@b210000 {
> compatible = "qcom,sdx65-pdc", "qcom,pdc";
> reg = <0xb210000 0x10000>;
> --
> 2.32.0
>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2021-07-09 20:08 [PATCH 0/1] Devicetree update for SDX65 platform quic_vamslank
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2021-07-10 3:12 ` Bjorn Andersson
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