From: Rob Herring <robh@kernel.org>
To: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Cc: linuxarm@huawei.com, mauro.chehab@huawei.com,
Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-phy@lists.infradead.org
Subject: Re: [PATCH v3 4/4] dt-bindings: phy: Add bindings for HiKey 970 PCIe PHY
Date: Tue, 3 Aug 2021 16:29:00 -0600 [thread overview]
Message-ID: <YQnDLFmvV3AtihBy@robh.at.kernel.org> (raw)
In-Reply-To: <b5809d8acf257834dd84807aa0474f68a94d8084.1627965261.git.mchehab+huawei@kernel.org>
On Tue, Aug 03, 2021 at 06:38:58AM +0200, Mauro Carvalho Chehab wrote:
> Document the bindings for HiKey 970 (hi3670) PCIe PHY
> interface, supported via the pcie-kirin driver.
>
> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
> ---
> .../phy/hisilicon,phy-hi3670-pcie.yaml | 86 +++++++++++++++++++
> 1 file changed, 86 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml b/Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml
> new file mode 100644
> index 000000000000..1e0153e4f4a5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml
> @@ -0,0 +1,86 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/hisilicon,phy-hi3670-pcie.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: HiSilicon Kirin970 PCIe PHY
> +
> +maintainers:
> + - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
> +
> +description: |+
> + Bindings for PCIe PHY on HiSilicon Kirin 970.
> +
> +properties:
> + compatible:
> + const: hisilicon,hi970-pcie-phy
> +
> + "#phy-cells":
> + const: 0
> +
> + reg:
> + maxItems: 1
> + description: PHY Control registers
> +
> + phy-supply:
> + description: The PCIe PHY power supply
> +
> + clocks:
> + items:
> + - description: PCIe PHY clock
> + - description: PCIe AUX clock
> + - description: PCIe APB PHY clock
> + - description: PCIe APB SYS clock
> + - description: PCIe ACLK clock
> +
> + clock-names:
> + items:
> + - const: phy_ref
> + - const: aux
> + - const: apb_phy
> + - const: apb_sys
> + - const: aclk
> +
> + clkreq-gpios:
> + description: Clock request GPIOs
> + maxItems: 3
This can be dropped now?
If not, at least use the same property name. (But really, why duplicate
information in DT).
Rob
next prev parent reply other threads:[~2021-08-03 22:29 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-03 4:38 [PATCH v3 0/4] DT schema changes for HiKey970 PCIe hardware to work Mauro Carvalho Chehab
2021-08-03 4:38 ` [PATCH v3 1/4] dt-bindings: PCI: kirin: Fix compatible string Mauro Carvalho Chehab
2021-08-03 22:22 ` Rob Herring
2021-08-03 4:38 ` [PATCH v3 2/4] dt-bindings: PCI: kirin: Convert kirin-pcie.txt to yaml Mauro Carvalho Chehab
2021-08-03 22:27 ` Rob Herring
2021-08-03 4:38 ` [PATCH v3 3/4] dt-bindings: PCI: kirin: Add support for Kirin970 Mauro Carvalho Chehab
2021-08-03 4:38 ` [PATCH v3 4/4] dt-bindings: phy: Add bindings for HiKey 970 PCIe PHY Mauro Carvalho Chehab
2021-08-03 22:29 ` Rob Herring [this message]
2021-08-03 22:11 ` [PATCH v3 0/4] DT schema changes for HiKey970 PCIe hardware to work Rob Herring
2021-08-04 6:50 ` Mauro Carvalho Chehab
2021-08-04 16:28 ` Rob Herring
2021-08-05 7:46 ` Mauro Carvalho Chehab
2021-08-05 7:58 ` Mauro Carvalho Chehab
2021-08-06 16:23 ` Rob Herring
2021-08-10 9:42 ` Mauro Carvalho Chehab
2021-08-10 13:44 ` Rob Herring
2021-08-10 14:20 ` Mauro Carvalho Chehab
2021-08-10 17:13 ` Rob Herring
2021-08-10 17:52 ` Rob Herring
2021-08-11 7:11 ` Mauro Carvalho Chehab
2021-08-11 6:46 ` Mauro Carvalho Chehab
2021-08-12 3:13 ` Rob Herring
2021-08-12 7:48 ` Mauro Carvalho Chehab
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