From: Rob Herring <robh@kernel.org>
To: Bharat Bhushan <bbhushan2@marvell.com>
Cc: robh+dt@kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, will@kernel.org,
devicetree@vger.kernel.org, mark.rutland@arm.com
Subject: Re: [PATCH v3 1/4] dt-bindings: perf: marvell: cn10k ddr performance monitor
Date: Tue, 24 Aug 2021 07:28:36 -0500 [thread overview]
Message-ID: <YSTl9PQpwP9OiCbY@robh.at.kernel.org> (raw)
In-Reply-To: <20210823065121.19494-2-bbhushan2@marvell.com>
On Mon, 23 Aug 2021 12:21:18 +0530, Bharat Bhushan wrote:
> Add binding documentation for the Marvell CN10k DDR
> performance monitor unit.
>
> Signed-off-by: Bharat Bhushan <bbhushan2@marvell.com>
> ---
> v2->v3:
> - dt-binding, ddrcpmu@1 -> pmu@87e1c0000000
>
> v1->v2:
> - DT binding changed to new DT Schema
>
> .../bindings/perf/marvell-cn10k-ddr.yaml | 37 +++++++++++++++++++
> 1 file changed, 37 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml
>
Reviewed-by: Rob Herring <robh@kernel.org>
next prev parent reply other threads:[~2021-08-24 12:28 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-23 6:51 [PATCH v3 0/4] cn10k DDR Performance monitor support Bharat Bhushan
2021-08-23 6:51 ` [PATCH v3 1/4] dt-bindings: perf: marvell: cn10k ddr performance monitor Bharat Bhushan
2021-08-24 12:28 ` Rob Herring [this message]
2021-08-23 6:51 ` [PATCH v3 2/4] perf/marvell: CN10k DDR performance monitor support Bharat Bhushan
2021-08-23 6:51 ` [PATCH v3 3/4] perf/marvell: cn10k DDR perfmon event overflow handling Bharat Bhushan
2021-08-23 6:51 ` [PATCH v3 4/4] perf/marvell: cn10k DDR perf event core ownership Bharat Bhushan
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