From: Alyssa Rosenzweig <alyssa@rosenzweig.io>
To: Marc Zyngier <maz@kernel.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, "Bjorn Helgaas" <bhelgaas@google.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Stan Skowronek" <stan@corellium.com>,
"Mark Kettenis" <kettenis@openbsd.org>,
"Sven Peter" <sven@svenpeter.dev>,
"Hector Martin" <marcan@marcan.st>,
"Robin Murphy" <Robin.Murphy@arm.com>,
kernel-team@android.com
Subject: Re: [PATCH v3 08/10] PCI: apple: Implement MSI support
Date: Mon, 13 Sep 2021 16:43:23 -0400 [thread overview]
Message-ID: <YT+36/qmoO+ZfJXh@sunset> (raw)
In-Reply-To: <20210913182550.264165-9-maz@kernel.org>
> +static void apple_msi_compose_msg(struct irq_data *data, struct msi_msg *msg)
> +{
> + BUILD_BUG_ON(upper_32_bits(DOORBELL_ADDR));
> +
> + msg->address_hi = upper_32_bits(DOORBELL_ADDR);
> + msg->address_lo = lower_32_bits(DOORBELL_ADDR);
> + msg->data = data->hwirq;
> +}
...
> @@ -269,6 +378,14 @@ static int apple_pcie_port_setup_irq(struct apple_pcie_port *port)
>
> irq_set_chained_handler_and_data(irq, apple_port_irq_handler, port);
>
> + /* Configure MSI base address */
> + writel_relaxed(lower_32_bits(DOORBELL_ADDR), port->base + PORT_MSIADDR);
> +
> + /* Enable MSIs, shared between all ports */
> + writel_relaxed(0, port->base + PORT_MSIBASE);
> + writel_relaxed((ilog2(port->pcie->nvecs) << PORT_MSICFG_L2MSINUM_SHIFT) |
> + PORT_MSICFG_EN, port->base + PORT_MSICFG);
> +
> return 0;
> }
I think the BUILD_BUG_ON makes more sense next to configuring the base
address (which only has a 32-bit register, the BUILD_BUG_ON justifies
using writel and not writeq), rather than configuring the message (which
specifies the full 64-bits).
next prev parent reply other threads:[~2021-09-13 20:44 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-13 18:25 [PATCH v3 00/10] PCI: Add support for Apple M1 Marc Zyngier
2021-09-13 18:25 ` [PATCH v3 01/10] irqdomain: Make of_phandle_args_to_fwspec generally available Marc Zyngier
2021-09-13 18:25 ` [PATCH v3 02/10] of/irq: Allow matching of an interrupt-map local to an interrupt controller Marc Zyngier
2021-09-13 21:13 ` Rob Herring
2021-09-13 18:25 ` [PATCH v3 03/10] PCI: of: Allow matching of an interrupt-map local to a pci device Marc Zyngier
2021-09-13 21:30 ` Rob Herring
2021-09-14 19:09 ` Bjorn Helgaas
2021-09-13 18:25 ` [PATCH v3 04/10] PCI: apple: Add initial hardware bring-up Marc Zyngier
2021-09-13 20:48 ` Sven Peter
2021-09-17 9:20 ` Marc Zyngier
2021-09-17 10:42 ` Hector Martin
2021-09-13 18:25 ` [PATCH v3 05/10] PCI: apple: Set up reference clocks when probing Marc Zyngier
2021-09-13 18:25 ` [PATCH v3 06/10] PCI: apple: Add INTx and per-port interrupt support Marc Zyngier
2021-09-13 18:25 ` [PATCH v3 07/10] arm64: apple: t8103: Add root port interrupt routing Marc Zyngier
2021-09-13 18:25 ` [PATCH v3 08/10] PCI: apple: Implement MSI support Marc Zyngier
2021-09-13 20:43 ` Alyssa Rosenzweig [this message]
2021-09-17 9:08 ` Marc Zyngier
2021-09-13 18:25 ` [PATCH v3 09/10] iommu/dart: Exclude MSI doorbell from PCIe device IOVA range Marc Zyngier
2021-09-13 18:55 ` Alyssa Rosenzweig
2021-09-17 10:05 ` Marc Zyngier
2021-09-14 13:54 ` Sven Peter
2021-09-17 10:01 ` Marc Zyngier
2021-09-13 18:25 ` [PATCH v3 10/10] PCI: apple: Configure RID to SID mapper on device addition Marc Zyngier
2021-09-13 20:45 ` Sven Peter
2021-09-14 9:35 ` Marc Zyngier
2021-09-14 9:56 ` Mark Kettenis
2021-09-17 9:19 ` Marc Zyngier
2021-09-17 9:31 ` Mark Kettenis
2021-09-14 13:56 ` Sven Peter
2021-09-19 11:39 ` [PATCH v3 00/10] PCI: Add support for Apple M1 Alyssa Rosenzweig
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