Re: [PATCH 1/3] dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs

[Rob Herring <robh@kernel.org>]

On Thu, Sep 02, 2021 at 02:59:08PM +0530, kavyasree.kotagiri@microchip.com wrote:
> From: Kavyasree Kotagiri <Kavyasree.Kotagiri@microchip.com>
> 
> LAN966X supports 14 clock outputs for its peripherals.
> This include file is introduced to use identifiers for clocks.
> 
> Signed-off-by: Kavya Sree Kotagiri <kavyasree.kotagiri@microchip.com>
> ---
>  include/dt-bindings/clock/microchip,lan966x.h | 28 +++++++++++++++++++
>  1 file changed, 28 insertions(+)
>  create mode 100644 include/dt-bindings/clock/microchip,lan966x.h
> 
> diff --git a/include/dt-bindings/clock/microchip,lan966x.h b/include/dt-bindings/clock/microchip,lan966x.h
> new file mode 100644
> index 000000000000..97dd9d6480a8
> --- /dev/null
> +++ b/include/dt-bindings/clock/microchip,lan966x.h
> @@ -0,0 +1,28 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */

Dual license please.

Where's the rest of the series? Lore only finds 1/3.


> +/*
> + * Copyright (c) 2021 Microchip Inc.
> + *
> + * Author: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
> + */
> +
> +#ifndef _DT_BINDINGS_CLK_LAN966X_H
> +#define _DT_BINDINGS_CLK_LAN966X_H
> +
> +#define GCK_ID_QSPI0		0
> +#define GCK_ID_QSPI1		1
> +#define GCK_ID_QSPI2		2
> +#define GCK_ID_SDMMC0		3
> +#define GCK_ID_PI		4
> +#define GCK_ID_MCAN0		5
> +#define GCK_ID_MCAN1		6
> +#define GCK_ID_FLEXCOM0		7
> +#define GCK_ID_FLEXCOM1		8
> +#define GCK_ID_FLEXCOM2		9
> +#define GCK_ID_FLEXCOM3		10
> +#define GCK_ID_FLEXCOM4		11
> +#define GCK_ID_TIMER		12
> +#define GCK_ID_USB_REFCLK	13
> +
> +#define N_CLOCKS		14
> +
> +#endif
> --
> 2.17.1
> 
>