* [PATCH 1/3] dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs
@ 2021-09-02 9:29 kavyasree.kotagiri
2021-09-07 18:57 ` Rob Herring
0 siblings, 1 reply; 2+ messages in thread
From: kavyasree.kotagiri @ 2021-09-02 9:29 UTC (permalink / raw)
To: robh+dt, mturquette, sboyd
Cc: linux-kernel, devicetree, linux-clk, UNGLinuxDriver,
Eugen.Hristev, Kavyasree.Kotagiri, Manohar.Puri
From: Kavyasree Kotagiri <Kavyasree.Kotagiri@microchip.com>
LAN966X supports 14 clock outputs for its peripherals.
This include file is introduced to use identifiers for clocks.
Signed-off-by: Kavya Sree Kotagiri <kavyasree.kotagiri@microchip.com>
---
include/dt-bindings/clock/microchip,lan966x.h | 28 +++++++++++++++++++
1 file changed, 28 insertions(+)
create mode 100644 include/dt-bindings/clock/microchip,lan966x.h
diff --git a/include/dt-bindings/clock/microchip,lan966x.h b/include/dt-bindings/clock/microchip,lan966x.h
new file mode 100644
index 000000000000..97dd9d6480a8
--- /dev/null
+++ b/include/dt-bindings/clock/microchip,lan966x.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2021 Microchip Inc.
+ *
+ * Author: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
+ */
+
+#ifndef _DT_BINDINGS_CLK_LAN966X_H
+#define _DT_BINDINGS_CLK_LAN966X_H
+
+#define GCK_ID_QSPI0 0
+#define GCK_ID_QSPI1 1
+#define GCK_ID_QSPI2 2
+#define GCK_ID_SDMMC0 3
+#define GCK_ID_PI 4
+#define GCK_ID_MCAN0 5
+#define GCK_ID_MCAN1 6
+#define GCK_ID_FLEXCOM0 7
+#define GCK_ID_FLEXCOM1 8
+#define GCK_ID_FLEXCOM2 9
+#define GCK_ID_FLEXCOM3 10
+#define GCK_ID_FLEXCOM4 11
+#define GCK_ID_TIMER 12
+#define GCK_ID_USB_REFCLK 13
+
+#define N_CLOCKS 14
+
+#endif
--
2.17.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH 1/3] dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs
2021-09-02 9:29 [PATCH 1/3] dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs kavyasree.kotagiri
@ 2021-09-07 18:57 ` Rob Herring
0 siblings, 0 replies; 2+ messages in thread
From: Rob Herring @ 2021-09-07 18:57 UTC (permalink / raw)
To: kavyasree.kotagiri
Cc: mturquette, sboyd, linux-kernel, devicetree, linux-clk,
UNGLinuxDriver, Eugen.Hristev, Manohar.Puri
On Thu, Sep 02, 2021 at 02:59:08PM +0530, kavyasree.kotagiri@microchip.com wrote:
> From: Kavyasree Kotagiri <Kavyasree.Kotagiri@microchip.com>
>
> LAN966X supports 14 clock outputs for its peripherals.
> This include file is introduced to use identifiers for clocks.
>
> Signed-off-by: Kavya Sree Kotagiri <kavyasree.kotagiri@microchip.com>
> ---
> include/dt-bindings/clock/microchip,lan966x.h | 28 +++++++++++++++++++
> 1 file changed, 28 insertions(+)
> create mode 100644 include/dt-bindings/clock/microchip,lan966x.h
>
> diff --git a/include/dt-bindings/clock/microchip,lan966x.h b/include/dt-bindings/clock/microchip,lan966x.h
> new file mode 100644
> index 000000000000..97dd9d6480a8
> --- /dev/null
> +++ b/include/dt-bindings/clock/microchip,lan966x.h
> @@ -0,0 +1,28 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
Dual license please.
Where's the rest of the series? Lore only finds 1/3.
> +/*
> + * Copyright (c) 2021 Microchip Inc.
> + *
> + * Author: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
> + */
> +
> +#ifndef _DT_BINDINGS_CLK_LAN966X_H
> +#define _DT_BINDINGS_CLK_LAN966X_H
> +
> +#define GCK_ID_QSPI0 0
> +#define GCK_ID_QSPI1 1
> +#define GCK_ID_QSPI2 2
> +#define GCK_ID_SDMMC0 3
> +#define GCK_ID_PI 4
> +#define GCK_ID_MCAN0 5
> +#define GCK_ID_MCAN1 6
> +#define GCK_ID_FLEXCOM0 7
> +#define GCK_ID_FLEXCOM1 8
> +#define GCK_ID_FLEXCOM2 9
> +#define GCK_ID_FLEXCOM3 10
> +#define GCK_ID_FLEXCOM4 11
> +#define GCK_ID_TIMER 12
> +#define GCK_ID_USB_REFCLK 13
> +
> +#define N_CLOCKS 14
> +
> +#endif
> --
> 2.17.1
>
>
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2021-09-02 9:29 [PATCH 1/3] dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs kavyasree.kotagiri
2021-09-07 18:57 ` Rob Herring
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