Re: [PATCH v3 5/9] clk: imx: Add 'CLK_SET_RATE_NO_REPARENT' for composite-7ulp

[Abel Vesa <abel.vesa@nxp.com>]

On 21-09-14 14:52:04, Jacky Bai wrote:
> For the imx_composite-7ulp clock type, The clock parent should
> be changed explicitly by end user of this clock, if the the
> 'CLK_SET_RATE_NO_REPARENT' flag is not set, when user want to
> set a clock frequency that can NOT get from HW accurately, then
> the clock's parent will be switch to another clock parent sometimes.
> This is NOT what we expected and introduced some additional debug
> effort, so add the 'CLK_SET_RATE_NO_REPARENT' to avoid such unexpected
> result.
> 
> Signed-off-by: Jacky Bai <ping.bai@nxp.com>

Reviewed-by: Abel Vesa <abel.vesa@nxp.com>

> ---
>   v3 changs: no
> ---
>  drivers/clk/imx/clk-composite-7ulp.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/imx/clk-composite-7ulp.c b/drivers/clk/imx/clk-composite-7ulp.c
> index 92908ee4509d..9ce8c630ee32 100644
> --- a/drivers/clk/imx/clk-composite-7ulp.c
> +++ b/drivers/clk/imx/clk-composite-7ulp.c
> @@ -131,7 +131,7 @@ static struct clk_hw *imx_ulp_clk_hw_composite(const char *name,
>  				       mux_hw, &clk_mux_ops, fd_hw,
>  				       &clk_fractional_divider_ops, gate_hw,
>  				       has_swrst ? &pcc_gate_ops : &clk_gate_ops, CLK_SET_RATE_GATE |
> -				       CLK_SET_PARENT_GATE);
> +				       CLK_SET_PARENT_GATE | CLK_SET_RATE_NO_REPARENT);
>  	if (IS_ERR(hw)) {
>  		kfree(mux);
>  		kfree(fd);
> -- 
> 2.26.2
>