* [PATCH 0/3] phy: stm32: add phy tuning support
@ 2021-09-14 14:52 Amelie Delaunay
2021-09-14 14:52 ` [PATCH 1/3] phy: stm32: restore utmi switch on resume Amelie Delaunay
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Amelie Delaunay @ 2021-09-14 14:52 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Vinod Koul, Rob Herring, Alexandre Torgue,
Maxime Coquelin
Cc: linux-phy, linux-kernel, devicetree, linux-arm-kernel,
linux-stm32, Amelie Delaunay
This series brings phy tuning to stm32-usbphyc with a new optional
device tree property st,phy-tuning, the elements of which
(st,phy-tuning node properties) are also optional.
A prior patch add resume routine, which is used to restore UTMI
switch and phy tuning configuration, as they can be reset if
deep low power state is achieved.
Amelie Delaunay (3):
phy: stm32: restore utmi switch on resume
dt-bindings: phy: phy-stm32-usbphyc: add st,phy-tuning optional
property
phy: stm32: add phy tuning support
.../bindings/phy/phy-stm32-usbphyc.yaml | 68 ++++++
drivers/phy/st/phy-stm32-usbphyc.c | 208 ++++++++++++++++++
2 files changed, 276 insertions(+)
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 1/3] phy: stm32: restore utmi switch on resume 2021-09-14 14:52 [PATCH 0/3] phy: stm32: add phy tuning support Amelie Delaunay @ 2021-09-14 14:52 ` Amelie Delaunay 2021-09-14 14:52 ` [PATCH 2/3] dt-bindings: phy: phy-stm32-usbphyc: add st,phy-tuning optional property Amelie Delaunay 2021-09-14 14:52 ` [PATCH 3/3] phy: stm32: add phy tuning support Amelie Delaunay 2 siblings, 0 replies; 6+ messages in thread From: Amelie Delaunay @ 2021-09-14 14:52 UTC (permalink / raw) To: Kishon Vijay Abraham I, Vinod Koul, Rob Herring, Alexandre Torgue, Maxime Coquelin Cc: linux-phy, linux-kernel, devicetree, linux-arm-kernel, linux-stm32, Amelie Delaunay UTMI switch value can be lost during suspend/resume, depending on the power state reached. This patch adds resume function to usbphyc, to reconfigure utmi switch after suspend. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> --- drivers/phy/st/phy-stm32-usbphyc.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/phy/st/phy-stm32-usbphyc.c b/drivers/phy/st/phy-stm32-usbphyc.c index 937a14fa7448..083593aea53a 100644 --- a/drivers/phy/st/phy-stm32-usbphyc.c +++ b/drivers/phy/st/phy-stm32-usbphyc.c @@ -598,6 +598,18 @@ static int stm32_usbphyc_remove(struct platform_device *pdev) return 0; } +static int __maybe_unused stm32_usbphyc_resume(struct device *dev) +{ + struct stm32_usbphyc *usbphyc = dev_get_drvdata(dev); + + if (usbphyc->switch_setup >= 0) + stm32_usbphyc_switch_setup(usbphyc, usbphyc->switch_setup); + + return 0; +} + +static SIMPLE_DEV_PM_OPS(stm32_usbphyc_pm_ops, NULL, stm32_usbphyc_resume); + static const struct of_device_id stm32_usbphyc_of_match[] = { { .compatible = "st,stm32mp1-usbphyc", }, { }, @@ -610,6 +622,7 @@ static struct platform_driver stm32_usbphyc_driver = { .driver = { .of_match_table = stm32_usbphyc_of_match, .name = "stm32-usbphyc", + .pm = &stm32_usbphyc_pm_ops, } }; module_platform_driver(stm32_usbphyc_driver); -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/3] dt-bindings: phy: phy-stm32-usbphyc: add st,phy-tuning optional property 2021-09-14 14:52 [PATCH 0/3] phy: stm32: add phy tuning support Amelie Delaunay 2021-09-14 14:52 ` [PATCH 1/3] phy: stm32: restore utmi switch on resume Amelie Delaunay @ 2021-09-14 14:52 ` Amelie Delaunay 2021-09-21 20:55 ` Rob Herring 2021-09-14 14:52 ` [PATCH 3/3] phy: stm32: add phy tuning support Amelie Delaunay 2 siblings, 1 reply; 6+ messages in thread From: Amelie Delaunay @ 2021-09-14 14:52 UTC (permalink / raw) To: Kishon Vijay Abraham I, Vinod Koul, Rob Herring, Alexandre Torgue, Maxime Coquelin Cc: linux-phy, linux-kernel, devicetree, linux-arm-kernel, linux-stm32, Amelie Delaunay This patch adds the description of a new optional property for usbphyc phy sub nodes. st,phy-tuning contains all phy tuning parameters to apply on the phy. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> --- .../bindings/phy/phy-stm32-usbphyc.yaml | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml index 3329f1d33a4f..0fa184ea54db 100644 --- a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml +++ b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml @@ -81,6 +81,60 @@ patternProperties: properties: vbus-supply: true + st,phy-tuning: + $ref: /schemas/types.yaml#/definitions/phandle + description: + It can be necessary to adjust the PHY settings to compensate parasitics, which can be due + to USB connector/receptacle, routing, ESD protection component,... Here is the list of + all optional parameters to tune the interface of the PHY (HS for High-Speed, FS for Full- + Speed, LS for Low-Speed) + * st,current-boost, <1> current boosting of 1mA + <2> current boosting of 2mA + * st,no-lsfs-fb-cap, disables the LS/FS feedback capacitor + * st,hs-slew-ctrl, slows the HS driver slew rate by 10% + * st,hs-dc-level, <0> = decreases the HS driver DC level by 5 to 7mV + <1> = increases the HS driver DC level by 5 to 7mV + <2> = increases the HS driver DC level by 10 to 14mV + * st,fs-rftime-tuning, enables the FS rise/fall tuning option + * st,hs-rftime-reduction, enables the HS rise/fall reduction feature + * st,hs-current-trim, controls HS driver current trimming for choke + <0> = 18.87 mA target current / nominal + 0% + <1> = 19.165 mA target current / nominal + 1.56% + <2> = 19.46 mA target current / nominal + 3.12% + <3> = 19.755 mA target current / nominal + 4.68% + <4> = 20.05 mA target current / nominal + 6.24% + <5> = 20.345 mA target current / nominal + 7.8% + <6> = 20.64 mA target current / nominal + 9.36% + <7> = 20.935 mA target current / nominal + 10.92% + <8> = 21.23 mA target current / nominal + 12.48% + <9> = 21.525 mA target current / nominal + 14.04% + <10> = 21.82 mA target current / nominal + 15.6% + <11> = 22.115 mA target current / nominal + 17.16% + <12> = 22.458 mA target current / nominal + 19.01% + <13> = 22.755 mA target current / nominal + 20.58% + <14> = 23.052 mA target current / nominal + 22.16% + <15> = 23.348 mA target current / nominal + 23.73% + * st,hs-impedance-trim, controls HS driver impedance tuning for choke + <0> = no impedance offset + <1> = reduces the impedance by 2 ohms + <2> = reduces the impedance by 4 ohms + <3> = reduces the impedance by 6 ohms + * st,squelch-level, adjusts the squelch DC threshold value + <0> = no shift in threshold + <1> = threshold shift by +7 mV + <2> = threshold shift by -5 mV + <3> = threshold shift by +14 mV + * st,hs-rx-gain-eq, enables the HS Rx gain equalizer + * st,hs-rx-offset, adjusts the HS Rx offset + <0> = no offset + <1> = offset of +5 mV + <2> = offset of +10 mV + <3> = offset of -5 mV + * st,no-hs-ftime-ctrl, disables the HS fall time control of single ended signals + during pre-emphasis + * st,no-lsfs-sc, disables the short circuit protection in LS/FS driver + * st,hs-tx-staggering, enables the basic staggering in HS Tx mode + allOf: - if: properties: @@ -122,6 +176,18 @@ examples: - | #include <dt-bindings/clock/stm32mp1-clks.h> #include <dt-bindings/reset/stm32mp1-resets.h> + + usb_phy_tuning: usb-phy-tuning { + st,hs-dc-level = <2>; + st,fs-rftime-tuning; + st,hs-rftime-reduction; + st,hs-current-trim = <15>; + st,hs-impedance-trim = <1>; + st,squelch-level = <3>; + st,hs-rx-offset = <2>; + st,no-lsfs-sc; + }; + usbphyc: usbphyc@5a006000 { compatible = "st,stm32mp1-usbphyc"; reg = <0x5a006000 0x1000>; @@ -137,6 +203,7 @@ examples: reg = <0>; phy-supply = <&vdd_usb>; #phy-cells = <0>; + st,phy-tuning = <&usb_phy_tuning>; connector { compatible = "usb-a-connector"; vbus-supply = <&vbus_sw>; @@ -147,6 +214,7 @@ examples: reg = <1>; phy-supply = <&vdd_usb>; #phy-cells = <1>; + st,phy-tuning = <&usb_phy_tuning>; }; }; ... -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/3] dt-bindings: phy: phy-stm32-usbphyc: add st,phy-tuning optional property 2021-09-14 14:52 ` [PATCH 2/3] dt-bindings: phy: phy-stm32-usbphyc: add st,phy-tuning optional property Amelie Delaunay @ 2021-09-21 20:55 ` Rob Herring 2021-09-22 15:12 ` Amelie DELAUNAY 0 siblings, 1 reply; 6+ messages in thread From: Rob Herring @ 2021-09-21 20:55 UTC (permalink / raw) To: Amelie Delaunay Cc: Kishon Vijay Abraham I, Vinod Koul, Alexandre Torgue, Maxime Coquelin, linux-phy, linux-kernel, devicetree, linux-arm-kernel, linux-stm32 On Tue, Sep 14, 2021 at 04:52:55PM +0200, Amelie Delaunay wrote: > This patch adds the description of a new optional property for usbphyc phy Looks like a lot more than a property. > sub nodes. st,phy-tuning contains all phy tuning parameters to apply on the > phy. > > Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> > --- > .../bindings/phy/phy-stm32-usbphyc.yaml | 68 +++++++++++++++++++ > 1 file changed, 68 insertions(+) > > diff --git a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml > index 3329f1d33a4f..0fa184ea54db 100644 > --- a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml > +++ b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml > @@ -81,6 +81,60 @@ patternProperties: > properties: > vbus-supply: true > > + st,phy-tuning: > + $ref: /schemas/types.yaml#/definitions/phandle Looks like a node to me (type: object). But why is a node needed here? > + description: > + It can be necessary to adjust the PHY settings to compensate parasitics, which can be due > + to USB connector/receptacle, routing, ESD protection component,... Here is the list of > + all optional parameters to tune the interface of the PHY (HS for High-Speed, FS for Full- > + Speed, LS for Low-Speed) > + * st,current-boost, <1> current boosting of 1mA > + <2> current boosting of 2mA Use standard unit suffix. All these need to be a schema, not free form text. > + * st,no-lsfs-fb-cap, disables the LS/FS feedback capacitor > + * st,hs-slew-ctrl, slows the HS driver slew rate by 10% Name the property such that it is self describing. 'slew control' doesn't say what it does to slew rate. > + * st,hs-dc-level, <0> = decreases the HS driver DC level by 5 to 7mV > + <1> = increases the HS driver DC level by 5 to 7mV > + <2> = increases the HS driver DC level by 10 to 14mV > + * st,fs-rftime-tuning, enables the FS rise/fall tuning option > + * st,hs-rftime-reduction, enables the HS rise/fall reduction feature > + * st,hs-current-trim, controls HS driver current trimming for choke > + <0> = 18.87 mA target current / nominal + 0% > + <1> = 19.165 mA target current / nominal + 1.56% > + <2> = 19.46 mA target current / nominal + 3.12% > + <3> = 19.755 mA target current / nominal + 4.68% > + <4> = 20.05 mA target current / nominal + 6.24% > + <5> = 20.345 mA target current / nominal + 7.8% > + <6> = 20.64 mA target current / nominal + 9.36% > + <7> = 20.935 mA target current / nominal + 10.92% > + <8> = 21.23 mA target current / nominal + 12.48% > + <9> = 21.525 mA target current / nominal + 14.04% > + <10> = 21.82 mA target current / nominal + 15.6% > + <11> = 22.115 mA target current / nominal + 17.16% > + <12> = 22.458 mA target current / nominal + 19.01% > + <13> = 22.755 mA target current / nominal + 20.58% > + <14> = 23.052 mA target current / nominal + 22.16% > + <15> = 23.348 mA target current / nominal + 23.73% > + * st,hs-impedance-trim, controls HS driver impedance tuning for choke > + <0> = no impedance offset > + <1> = reduces the impedance by 2 ohms > + <2> = reduces the impedance by 4 ohms > + <3> = reduces the impedance by 6 ohms > + * st,squelch-level, adjusts the squelch DC threshold value > + <0> = no shift in threshold > + <1> = threshold shift by +7 mV > + <2> = threshold shift by -5 mV > + <3> = threshold shift by +14 mV > + * st,hs-rx-gain-eq, enables the HS Rx gain equalizer > + * st,hs-rx-offset, adjusts the HS Rx offset > + <0> = no offset > + <1> = offset of +5 mV > + <2> = offset of +10 mV > + <3> = offset of -5 mV > + * st,no-hs-ftime-ctrl, disables the HS fall time control of single ended signals > + during pre-emphasis > + * st,no-lsfs-sc, disables the short circuit protection in LS/FS driver > + * st,hs-tx-staggering, enables the basic staggering in HS Tx mode > + > allOf: > - if: > properties: > @@ -122,6 +176,18 @@ examples: > - | > #include <dt-bindings/clock/stm32mp1-clks.h> > #include <dt-bindings/reset/stm32mp1-resets.h> > + > + usb_phy_tuning: usb-phy-tuning { > + st,hs-dc-level = <2>; > + st,fs-rftime-tuning; > + st,hs-rftime-reduction; > + st,hs-current-trim = <15>; > + st,hs-impedance-trim = <1>; > + st,squelch-level = <3>; > + st,hs-rx-offset = <2>; > + st,no-lsfs-sc; > + }; > + > usbphyc: usbphyc@5a006000 { > compatible = "st,stm32mp1-usbphyc"; > reg = <0x5a006000 0x1000>; > @@ -137,6 +203,7 @@ examples: > reg = <0>; > phy-supply = <&vdd_usb>; > #phy-cells = <0>; > + st,phy-tuning = <&usb_phy_tuning>; Just add all the properties here. > connector { > compatible = "usb-a-connector"; > vbus-supply = <&vbus_sw>; > @@ -147,6 +214,7 @@ examples: > reg = <1>; > phy-supply = <&vdd_usb>; > #phy-cells = <1>; > + st,phy-tuning = <&usb_phy_tuning>; > }; > }; > ... > -- > 2.25.1 > > ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/3] dt-bindings: phy: phy-stm32-usbphyc: add st,phy-tuning optional property 2021-09-21 20:55 ` Rob Herring @ 2021-09-22 15:12 ` Amelie DELAUNAY 0 siblings, 0 replies; 6+ messages in thread From: Amelie DELAUNAY @ 2021-09-22 15:12 UTC (permalink / raw) To: Rob Herring Cc: Kishon Vijay Abraham I, Vinod Koul, Alexandre Torgue, Maxime Coquelin, linux-phy, linux-kernel, devicetree, linux-arm-kernel, linux-stm32 Hi Rob, On 9/21/21 10:55 PM, Rob Herring wrote: > On Tue, Sep 14, 2021 at 04:52:55PM +0200, Amelie Delaunay wrote: >> This patch adds the description of a new optional property for usbphyc phy > > Looks like a lot more than a property. > >> sub nodes. st,phy-tuning contains all phy tuning parameters to apply on the >> phy. >> >> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> >> --- >> .../bindings/phy/phy-stm32-usbphyc.yaml | 68 +++++++++++++++++++ >> 1 file changed, 68 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml >> index 3329f1d33a4f..0fa184ea54db 100644 >> --- a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml >> +++ b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml >> @@ -81,6 +81,60 @@ patternProperties: >> properties: >> vbus-supply: true >> >> + st,phy-tuning: >> + $ref: /schemas/types.yaml#/definitions/phandle > > Looks like a node to me (type: object). But why is a node needed here? > stm32-usbphyc has two phy/child nodes and each phy can be individually tuned. Depending on the board layout, the tuning can be the same for each phy. The node here avoid to duplicate the tuning parameter in each phy/child node. I was inspired by Documentation/devicetree/bindings/net/snps,dwmac.yaml, snps,axi-config for example. >> + description: >> + It can be necessary to adjust the PHY settings to compensate parasitics, which can be due >> + to USB connector/receptacle, routing, ESD protection component,... Here is the list of >> + all optional parameters to tune the interface of the PHY (HS for High-Speed, FS for Full- >> + Speed, LS for Low-Speed) >> + * st,current-boost, <1> current boosting of 1mA >> + <2> current boosting of 2mA > > Use standard unit suffix. > Ok. > All these need to be a schema, not free form text. > I'm not familiar with schema, could you please point me an example to follow? >> + * st,no-lsfs-fb-cap, disables the LS/FS feedback capacitor >> + * st,hs-slew-ctrl, slows the HS driver slew rate by 10% > > Name the property such that it is self describing. 'slew control' > doesn't say what it does to slew rate. > Ok. >> + * st,hs-dc-level, <0> = decreases the HS driver DC level by 5 to 7mV >> + <1> = increases the HS driver DC level by 5 to 7mV >> + <2> = increases the HS driver DC level by 10 to 14mV >> + * st,fs-rftime-tuning, enables the FS rise/fall tuning option >> + * st,hs-rftime-reduction, enables the HS rise/fall reduction feature >> + * st,hs-current-trim, controls HS driver current trimming for choke >> + <0> = 18.87 mA target current / nominal + 0% >> + <1> = 19.165 mA target current / nominal + 1.56% >> + <2> = 19.46 mA target current / nominal + 3.12% >> + <3> = 19.755 mA target current / nominal + 4.68% >> + <4> = 20.05 mA target current / nominal + 6.24% >> + <5> = 20.345 mA target current / nominal + 7.8% >> + <6> = 20.64 mA target current / nominal + 9.36% >> + <7> = 20.935 mA target current / nominal + 10.92% >> + <8> = 21.23 mA target current / nominal + 12.48% >> + <9> = 21.525 mA target current / nominal + 14.04% >> + <10> = 21.82 mA target current / nominal + 15.6% >> + <11> = 22.115 mA target current / nominal + 17.16% >> + <12> = 22.458 mA target current / nominal + 19.01% >> + <13> = 22.755 mA target current / nominal + 20.58% >> + <14> = 23.052 mA target current / nominal + 22.16% >> + <15> = 23.348 mA target current / nominal + 23.73% >> + * st,hs-impedance-trim, controls HS driver impedance tuning for choke >> + <0> = no impedance offset >> + <1> = reduces the impedance by 2 ohms >> + <2> = reduces the impedance by 4 ohms >> + <3> = reduces the impedance by 6 ohms >> + * st,squelch-level, adjusts the squelch DC threshold value >> + <0> = no shift in threshold >> + <1> = threshold shift by +7 mV >> + <2> = threshold shift by -5 mV >> + <3> = threshold shift by +14 mV >> + * st,hs-rx-gain-eq, enables the HS Rx gain equalizer >> + * st,hs-rx-offset, adjusts the HS Rx offset >> + <0> = no offset >> + <1> = offset of +5 mV >> + <2> = offset of +10 mV >> + <3> = offset of -5 mV >> + * st,no-hs-ftime-ctrl, disables the HS fall time control of single ended signals >> + during pre-emphasis >> + * st,no-lsfs-sc, disables the short circuit protection in LS/FS driver >> + * st,hs-tx-staggering, enables the basic staggering in HS Tx mode >> + >> allOf: >> - if: >> properties: >> @@ -122,6 +176,18 @@ examples: >> - | >> #include <dt-bindings/clock/stm32mp1-clks.h> >> #include <dt-bindings/reset/stm32mp1-resets.h> >> + >> + usb_phy_tuning: usb-phy-tuning { >> + st,hs-dc-level = <2>; >> + st,fs-rftime-tuning; >> + st,hs-rftime-reduction; >> + st,hs-current-trim = <15>; >> + st,hs-impedance-trim = <1>; >> + st,squelch-level = <3>; >> + st,hs-rx-offset = <2>; >> + st,no-lsfs-sc; >> + }; >> + >> usbphyc: usbphyc@5a006000 { >> compatible = "st,stm32mp1-usbphyc"; >> reg = <0x5a006000 0x1000>; >> @@ -137,6 +203,7 @@ examples: >> reg = <0>; >> phy-supply = <&vdd_usb>; >> #phy-cells = <0>; >> + st,phy-tuning = <&usb_phy_tuning>; > > Just add all the properties here. > If I add all the properties here... >> connector { >> compatible = "usb-a-connector"; >> vbus-supply = <&vbus_sw>; >> @@ -147,6 +214,7 @@ examples: >> reg = <1>; >> phy-supply = <&vdd_usb>; >> #phy-cells = <1>; >> + st,phy-tuning = <&usb_phy_tuning>; >> }; ... I have to duplicate them also here (because on this example the layout is the same for both phys. That's why st,phy-tuning was a node. Please advise. Regards, Amelie >> }; >> ... >> -- >> 2.25.1 >> >> ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 3/3] phy: stm32: add phy tuning support 2021-09-14 14:52 [PATCH 0/3] phy: stm32: add phy tuning support Amelie Delaunay 2021-09-14 14:52 ` [PATCH 1/3] phy: stm32: restore utmi switch on resume Amelie Delaunay 2021-09-14 14:52 ` [PATCH 2/3] dt-bindings: phy: phy-stm32-usbphyc: add st,phy-tuning optional property Amelie Delaunay @ 2021-09-14 14:52 ` Amelie Delaunay 2 siblings, 0 replies; 6+ messages in thread From: Amelie Delaunay @ 2021-09-14 14:52 UTC (permalink / raw) To: Kishon Vijay Abraham I, Vinod Koul, Rob Herring, Alexandre Torgue, Maxime Coquelin Cc: linux-phy, linux-kernel, devicetree, linux-arm-kernel, linux-stm32, Amelie Delaunay It can be necessary to adjust the phys settings to compensate parasitics. This patch adds support of the new optional property st,phy-tuning to configure the tune interface of the phys of stm32-usbphyc. Properties of st,phy-tuning phandle are also optional, that's why each property is skipped if not found (-EINVAL). Phy tuning is restored on resume because if deep low power state is achieved, phy tuning configuration is reset. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> --- drivers/phy/st/phy-stm32-usbphyc.c | 195 +++++++++++++++++++++++++++++ 1 file changed, 195 insertions(+) diff --git a/drivers/phy/st/phy-stm32-usbphyc.c b/drivers/phy/st/phy-stm32-usbphyc.c index 083593aea53a..fb7ad7b8e815 100644 --- a/drivers/phy/st/phy-stm32-usbphyc.c +++ b/drivers/phy/st/phy-stm32-usbphyc.c @@ -20,6 +20,7 @@ #define STM32_USBPHYC_PLL 0x0 #define STM32_USBPHYC_MISC 0x8 #define STM32_USBPHYC_MONITOR(X) (0x108 + ((X) * 0x100)) +#define STM32_USBPHYC_TUNE(X) (0x10C + ((X) * 0x100)) #define STM32_USBPHYC_VERSION 0x3F4 /* STM32_USBPHYC_PLL bit fields */ @@ -41,6 +42,83 @@ #define STM32_USBPHYC_MON_SEL_LOCKP 0x1F #define STM32_USBPHYC_MON_OUT_LOCKP BIT(3) +/* STM32_USBPHYC_TUNE bit fields */ +#define INCURREN BIT(0) +#define INCURRINT BIT(1) +#define LFSCAPEN BIT(2) +#define HSDRVSLEW BIT(3) +#define HSDRVDCCUR BIT(4) +#define HSDRVDCLEV BIT(5) +#define HSDRVCURINCR BIT(6) +#define FSDRVRFADJ BIT(7) +#define HSDRVRFRED BIT(8) +#define HSDRVCHKITRM GENMASK(12, 9) +#define HSDRVCHKZTRM GENMASK(14, 13) +#define OTPCOMP GENMASK(19, 15) +#define SQLCHCTL GENMASK(21, 20) +#define HDRXGNEQEN BIT(22) +#define HSRXOFF GENMASK(24, 23) +#define HSFALLPREEM BIT(25) +#define SHTCCTCTLPROT BIT(26) +#define STAGSEL BIT(27) + +enum boosting_vals { + BOOST_1_MA = 1, + BOOST_2_MA, + BOOST_MAX, +}; + +enum dc_level_vals { + DC_MINUS_5_TO_7_MV, + DC_PLUS_5_TO_7_MV, + DC_PLUS_10_TO_14_MV, + DC_MAX, +}; + +enum current_trim { + CUR_NOMINAL, + CUR_PLUS_1_56_PCT, + CUR_PLUS_3_12_PCT, + CUR_PLUS_4_68_PCT, + CUR_PLUS_6_24_PCT, + CUR_PLUS_7_8_PCT, + CUR_PLUS_9_36_PCT, + CUR_PLUS_10_92_PCT, + CUR_PLUS_12_48_PCT, + CUR_PLUS_14_04_PCT, + CUR_PLUS_15_6_PCT, + CUR_PLUS_17_16_PCT, + CUR_PLUS_19_01_PCT, + CUR_PLUS_20_58_PCT, + CUR_PLUS_22_16_PCT, + CUR_PLUS_23_73_PCT, + CUR_MAX, +}; + +enum impedance_trim { + IMP_NOMINAL, + IMP_MINUS_2_OHMS, + IMP_MINUS_4_OMHS, + IMP_MINUS_6_OHMS, + IMP_MAX, +}; + +enum squelch_level { + SQLCH_NOMINAL, + SQLCH_PLUS_7_MV, + SQLCH_MINUS_5_MV, + SQLCH_PLUS_14_MV, + SQLCH_MAX, +}; + +enum rx_offset { + NO_RX_OFFSET, + RX_OFFSET_PLUS_5_MV, + RX_OFFSET_PLUS_10_MV, + RX_OFFSET_MINUS_5_MV, + RX_OFFSET_MAX, +}; + /* STM32_USBPHYC_VERSION bit fields */ #define MINREV GENMASK(3, 0) #define MAJREV GENMASK(7, 4) @@ -60,6 +138,7 @@ struct stm32_usbphyc_phy { struct regulator *vbus; u32 index; bool active; + u32 tune; }; struct stm32_usbphyc { @@ -375,6 +454,111 @@ static int stm32_usbphyc_clk48_register(struct stm32_usbphyc *usbphyc) return ret; } +static void stm32_usbphyc_phy_tuning(struct stm32_usbphyc *usbphyc, + struct device_node *np, u32 index) +{ + struct stm32_usbphyc_phy *usbphyc_phy = usbphyc->phys[index]; + struct device_node *tune_np; + u32 reg = STM32_USBPHYC_TUNE(index); + u32 otpcomp, val; + int ret; + + /* st,phy-tuning is optional so skip phy tuning if not found */ + tune_np = of_parse_phandle(np, "st,phy-tuning", 0); + if (!tune_np) + return; + + /* Backup OTP compensation code */ + otpcomp = FIELD_GET(OTPCOMP, readl_relaxed(usbphyc->base + reg)); + + ret = of_property_read_u32(tune_np, "st,current-boost", &val); + if (ret != -EINVAL) { + if (!ret && val < BOOST_MAX) { + val = (val == BOOST_2_MA) ? 1 : 0; + usbphyc_phy->tune |= INCURREN | FIELD_PREP(INCURRINT, val); + } else { + dev_warn(usbphyc->dev, "phy%d: invalid st,current-boost value\n", index); + } + } + + if (!of_property_read_bool(tune_np, "st,no-lsfs-fb-cap")) + usbphyc_phy->tune |= LFSCAPEN; + + if (of_property_read_bool(tune_np, "st,hs-slew-ctrl")) + usbphyc_phy->tune |= HSDRVSLEW; + + ret = of_property_read_u32(tune_np, "st,hs-dc-level", &val); + if (ret != -EINVAL) { + if (!ret && val < DC_MAX) { + if (val == DC_MINUS_5_TO_7_MV) { + usbphyc_phy->tune |= HSDRVDCCUR; + } else { + val = (val == DC_PLUS_10_TO_14_MV) ? 1 : 0; + usbphyc_phy->tune |= HSDRVCURINCR | FIELD_PREP(HSDRVDCLEV, val); + } + } else { + dev_warn(usbphyc->dev, "phy%d: invalid st,hs-dc-level value\n", index); + } + } + + if (of_property_read_bool(tune_np, "st,fs-rftime-tuning")) + usbphyc_phy->tune |= FSDRVRFADJ; + + if (of_property_read_bool(tune_np, "st,hs-rftime-reduction")) + usbphyc_phy->tune |= HSDRVRFRED; + + ret = of_property_read_u32(tune_np, "st,hs-current-trim", &val); + if (ret != -EINVAL) { + if (!ret && val < CUR_MAX) + usbphyc_phy->tune |= FIELD_PREP(HSDRVCHKITRM, val); + else + dev_warn(usbphyc->dev, "phy%d: invalid st,hs-current-trim value\n", index); + } + + ret = of_property_read_u32(tune_np, "st,hs-impedance-trim", &val); + if (ret != -EINVAL) { + if (!ret && val < IMP_MAX) + usbphyc_phy->tune |= FIELD_PREP(HSDRVCHKZTRM, val); + else + dev_warn(usbphyc->dev, "phy%d: invalid hs-impedance-trim value\n", index); + } + + ret = of_property_read_u32(tune_np, "st,squelch-level", &val); + if (ret != -EINVAL) { + if (!ret && val < SQLCH_MAX) + usbphyc_phy->tune |= FIELD_PREP(SQLCHCTL, val); + else + dev_warn(usbphyc->dev, "phy%d: invalid st,squelch-level value\n", index); + } + + if (of_property_read_bool(tune_np, "st,hs-rx-gain-eq")) + usbphyc_phy->tune |= HDRXGNEQEN; + + ret = of_property_read_u32(tune_np, "st,hs-rx-offset", &val); + if (ret != -EINVAL) { + if (!ret && val < RX_OFFSET_MAX) + usbphyc_phy->tune |= FIELD_PREP(HSRXOFF, val); + else + dev_warn(usbphyc->dev, "phy%d: invalid st,hs-rx-offset value\n", index); + } + + if (of_property_read_bool(tune_np, "st,no-hs-ftime-ctrl")) + usbphyc_phy->tune |= HSFALLPREEM; + + if (!of_property_read_bool(tune_np, "st,no-lsfs-sc")) + usbphyc_phy->tune |= SHTCCTCTLPROT; + + if (of_property_read_bool(tune_np, "st,hs-tx-staggering")) + usbphyc_phy->tune |= STAGSEL; + + of_node_put(tune_np); + + /* Restore OTP compensation code */ + usbphyc_phy->tune |= FIELD_PREP(OTPCOMP, otpcomp); + + writel_relaxed(usbphyc_phy->tune, usbphyc->base + reg); +} + static void stm32_usbphyc_switch_setup(struct stm32_usbphyc *usbphyc, u32 utmi_switch) { @@ -550,6 +734,9 @@ static int stm32_usbphyc_probe(struct platform_device *pdev) usbphyc->phys[port]->vbus = NULL; } + /* Configure phy tuning */ + stm32_usbphyc_phy_tuning(usbphyc, child, index); + port++; } @@ -601,10 +788,18 @@ static int stm32_usbphyc_remove(struct platform_device *pdev) static int __maybe_unused stm32_usbphyc_resume(struct device *dev) { struct stm32_usbphyc *usbphyc = dev_get_drvdata(dev); + struct stm32_usbphyc_phy *usbphyc_phy; + int port; if (usbphyc->switch_setup >= 0) stm32_usbphyc_switch_setup(usbphyc, usbphyc->switch_setup); + for (port = 0; port < usbphyc->nphys; port++) { + usbphyc_phy = usbphyc->phys[port]; + if (usbphyc_phy->tune) + writel_relaxed(usbphyc_phy->tune, usbphyc->base + STM32_USBPHYC_TUNE(port)); + } + return 0; } -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-09-22 15:13 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2021-09-14 14:52 [PATCH 0/3] phy: stm32: add phy tuning support Amelie Delaunay 2021-09-14 14:52 ` [PATCH 1/3] phy: stm32: restore utmi switch on resume Amelie Delaunay 2021-09-14 14:52 ` [PATCH 2/3] dt-bindings: phy: phy-stm32-usbphyc: add st,phy-tuning optional property Amelie Delaunay 2021-09-21 20:55 ` Rob Herring 2021-09-22 15:12 ` Amelie DELAUNAY 2021-09-14 14:52 ` [PATCH 3/3] phy: stm32: add phy tuning support Amelie Delaunay
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