From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0987C433F5 for ; Thu, 7 Oct 2021 00:31:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B89356101A for ; Thu, 7 Oct 2021 00:31:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239779AbhJGAde (ORCPT ); Wed, 6 Oct 2021 20:33:34 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:53296 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230443AbhJGAdd (ORCPT ); Wed, 6 Oct 2021 20:33:33 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=TlbyboHcS7ad1wnQ59C4BfD/EqXlIcbqsHTWWn4Otf8=; b=LfE6AA6Y+bELnEbK5N0JdbzHRD RuJcpBJRK29eXgYAYC4WASy9lLix0IbhH9hx7gx9QkMrYe2RrwYcv/TghUJ9xsrJj6zLr7tx3pVuN SyO4fpoOt8IJPuGELXqieB5sn1T7tMbwmazwdzTr8qKHf0CKKOtoYo/BoNZH++6GtE0c=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1mYHJx-009tHY-DI; Thu, 07 Oct 2021 02:31:37 +0200 Date: Thu, 7 Oct 2021 02:31:37 +0200 From: Andrew Lunn To: Ansuel Smith Cc: Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [net-next PATCH 11/13] devicetree: net: dsa: qca8k: Document qca,sgmii-enable-pll Message-ID: References: <20211006223603.18858-1-ansuelsmth@gmail.com> <20211006223603.18858-12-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211006223603.18858-12-ansuelsmth@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org > +- qca,sgmii-enable-pll : For SGMII CPU port, explicitly enable PLL, TX and RX > + chain along with Signal Detection. Continuing on with the comment in the previous post. You might want to give a hit when this is needed. Andrew