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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id i13sm1500650oig.35.2021.10.28.16.25.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Oct 2021 16:25:11 -0700 (PDT) Date: Thu, 28 Oct 2021 16:27:01 -0700 From: Bjorn Andersson To: Odelu Kukatla Cc: georgi.djakov@linaro.org, evgreen@google.com, Andy Gross , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, sboyd@kernel.org, mdtipton@codeaurora.org, sibis@codeaurora.org, saravanak@google.com, seansw@qti.qualcomm.com, elder@linaro.org, linux-pm@vger.kernel.org, linux-arm-msm-owner@vger.kernel.org Subject: Re: [v8 3/3] arm64: dts: qcom: sc7280: Add EPSS L3 interconnect provider Message-ID: References: <1634812857-10676-1-git-send-email-okukatla@codeaurora.org> <1634812857-10676-4-git-send-email-okukatla@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1634812857-10676-4-git-send-email-okukatla@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu 21 Oct 03:40 PDT 2021, Odelu Kukatla wrote: > Add Epoch Subsystem (EPSS) L3 interconnect provider node on SC7280 > SoCs. > > Signed-off-by: Odelu Kukatla > --- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index d74a4c8..0b55742 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -3687,6 +3687,14 @@ > }; > }; > > + epss_l3: interconnect@18590000 { > + compatible = "qcom,sc7280-epss-l3"; > + reg = <0 0x18590000 0 0x1000>; This series looks like I would expect, with and without per-core dcvs. But can you please explain why this contradict what Sibi says here: https://lore.kernel.org/all/1627581885-32165-3-git-send-email-sibis@codeaurora.org/ Regards, Bjorn > + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; > + clock-names = "xo", "alternate"; > + #interconnect-cells = <1>; > + }; > + > cpufreq_hw: cpufreq@18591000 { > compatible = "qcom,cpufreq-epss"; > reg = <0 0x18591000 0 0x1000>, > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project >