From: Rob Herring <robh@kernel.org>
To: "hammer.hsieh" <hammerh0314@gmail.com>
Cc: gregkh@linuxfoundation.org, linux-serial@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
jirislaby@kernel.org, p.zabel@pengutronix.de,
tony.huang@sunplus.com, wells.lu@sunplus.com,
"hammer.hsieh" <hammer.hsieh@sunplus.com>
Subject: Re: [PATCH 1/2] dt-bindings:serial:Add bindings doc for Sunplus SoC UART Driver
Date: Mon, 1 Nov 2021 14:34:43 -0500 [thread overview]
Message-ID: <YYBBU+EPkheiUMuH@robh.at.kernel.org> (raw)
In-Reply-To: <1635752903-14968-2-git-send-email-hammer.hsieh@sunplus.com>
On Mon, Nov 01, 2021 at 03:48:22PM +0800, hammer.hsieh wrote:
> Add bindings doc for Sunplus SoC UART Driver
>
> Signed-off-by: hammer.hsieh <hammer.hsieh@sunplus.com>
> ---
> .../devicetree/bindings/serial/sunplus,uart.yaml | 116 +++++++++++++++++++++
> MAINTAINERS | 5 +
> 2 files changed, 121 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/serial/sunplus,uart.yaml
>
> diff --git a/Documentation/devicetree/bindings/serial/sunplus,uart.yaml b/Documentation/devicetree/bindings/serial/sunplus,uart.yaml
> new file mode 100644
> index 0000000..f2ca9ee
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/serial/sunplus,uart.yaml
> @@ -0,0 +1,116 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (C) Sunplus Co., Ltd. 2021
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/serial/sunplus,uart.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Sunplus SoC UART Controller Device Tree Bindings
> +
> +maintainers:
> + - Tony Huang <tony.huang@sunplus.com>
> + - Hammer Hsieh <hammer.hsieh@sunplus.com>
> + - Wells Lu <wells.lu@sunplus.com>
> +
> +allOf:
> + - $ref: serial.yaml#
> +
> +properties:
> + compatible:
> + const: sunplus,sp7021-uart
> +
> + reg:
> + minItems: 1
> + maxItems: 2
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + minItems: 1
> + maxItems: 2
> +
> + clock-names:
> + oneOf:
> + - items:
> + - const: UADMA
> + - const: PERI0
> + - items:
> + - const: UADMA
> + - const: PERI1
These 2 can be:
items:
- const UADMA
- pattern: '^PERI[0-1]$'
But why the difference for only one model of UART? The names should
reflect the function of the clock.
> + - items:
> + - const: HWUA
> + - const: PERI0
> + - items:
> + - const: HWUA
> + - const: PERI1
> +
> + resets:
> + maxItems: 1
> +
> + which-uart:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [ 1, 2, 3, 4]
What's this for? Looks like an index and we don't do indices in DT.
There is 'aliases' though.
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - resets
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/clock/sp-sp7021.h>
> + #include <dt-bindings/reset/sp-sp7021.h>
> + aliases {
> + serial0 = &uart0;
> + serial1 = &uart1;
> + serial10 = &uartdmarx0;
> + serial20 = &uartdmatx0;
> + };
> +
> + uart0: serial@9c000900 {
> + compatible = "sunplus,sp7021-uart";
> + reg = <0x9c000900 0x80>;
> + interrupt-parent = <&intc>;
> + interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clkc UA0>;
The schema says you must have 2 clocks.
> + resets = <&rstc RST_UA0>;
> + };
> +
> + // UART1 PIO mode
> + uart1: serial@9c000980 {
> + compatible = "sunplus,sp7021-uart";
> + reg = <0x9c000980 0x80>;
> + interrupt-parent = <&intc>;
> + interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clkc UA1>;
> + resets = <&rstc RST_UA1>;
> + };
> +
> + // UART1 DMA mode for RX
> + uartdmarx0: serial@9c008980 {
> + compatible = "sunplus,sp7021-uart";
> + reg = <0x9c008980 0x40>;
> + interrupt-parent = <&intc>;
> + interrupts = <138 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clkc UADMA>, <&clkc PERI0>;
> + clock-names = "UADMA", "PERI0";
> + resets = <&rstc RST_UADMA>;
> + which-uart = <1>;
> + };
> +
> + // UART1 DMA mode for TX
> + uartdmatx0: serial@9c008a00 {
> + compatible = "sunplus,sp7021-uart";
> + reg = <0x9c008a00 0x40>, <0x9c008880 0x80>;
> + clocks = <&clkc HWUA>, <&clkc PERI0>;
> + clock-names = "HWUA", "PERI0";
> + resets = <&rstc RST_HWUA>;
> + which-uart = <1>;
> + };
> +
> +...
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 3b79fd4..f863e97 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -17945,6 +17945,11 @@ L: netdev@vger.kernel.org
> S: Maintained
> F: drivers/net/ethernet/dlink/sundance.c
>
> +SUNPLUS UART DRIVER
> +M: Hammer Hsieh <hammer.hsieh@sunplus.com>
> +S: Maintained
> +F: Documentation/devicetree/bindings/serial/sunplus,uart.yaml
> +
> SUPERH
> M: Yoshinori Sato <ysato@users.sourceforge.jp>
> M: Rich Felker <dalias@libc.org>
> --
> 2.7.4
>
>
next prev parent reply other threads:[~2021-11-01 19:34 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-01 7:48 [PATCH 0/2] Add UART driver for Suplus SP7021 SoC hammer.hsieh
2021-11-01 7:48 ` [PATCH 1/2] dt-bindings:serial:Add bindings doc for Sunplus SoC UART Driver hammer.hsieh
2021-11-01 13:20 ` Rob Herring
2021-11-01 19:34 ` Rob Herring [this message]
2021-11-01 7:48 ` [PATCH 2/2] serial:sunplus-uart:Add " hammer.hsieh
2021-11-01 7:56 ` Greg KH
2021-11-10 7:51 ` [PATCH v2 0/2] Add UART driver for Suplus SP7021 SoC Hammer Hsieh
2021-11-10 7:51 ` [PATCH v2 1/2] dt-bindings:serial:Add bindings doc for Sunplus SoC UART Driver Hammer Hsieh
2021-11-10 7:51 ` [PATCH v2 2/2] serial:sunplus-uart:Add " Hammer Hsieh
2021-11-10 9:50 ` Philipp Zabel
2021-11-11 9:45 ` Hammer Hsieh 謝宏孟
2021-11-12 8:31 ` kernel test robot
2021-11-10 16:41 ` [PATCH v2 0/2] Add UART driver for Suplus SP7021 SoC Andy Shevchenko
2021-11-19 5:19 ` [PATCH v3 " Hammer Hsieh
2021-11-19 5:19 ` [PATCH v3 1/2] dt-bindings:serial:Add bindings doc for Sunplus SoC UART Driver Hammer Hsieh
2021-11-29 0:22 ` Rob Herring
2021-11-19 5:19 ` [PATCH v3 2/2] serial:sunplus-uart:Add " Hammer Hsieh
2021-11-19 9:35 ` Andy Shevchenko
2021-11-23 3:43 ` Hammer Hsieh 謝宏孟
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