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[66.90.148.213]) by smtp.gmail.com with ESMTPSA id p133sm4848317oia.11.2021.11.02.06.20.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Nov 2021 06:20:16 -0700 (PDT) Received: (nullmailer pid 2712189 invoked by uid 1000); Tue, 02 Nov 2021 13:20:15 -0000 Date: Tue, 2 Nov 2021 08:20:15 -0500 From: Rob Herring To: Akhil R Cc: dan.j.williams@intel.com, devicetree@vger.kernel.org, dmaengine@vger.kernel.org, jonathanh@nvidia.com, kyarlagadda@nvidia.com, ldewangan@nvidia.com, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, p.zabel@pengutronix.de, rgumasta@nvidia.com, thierry.reding@gmail.com, vkoul@kernel.org Subject: Re: [PATCH v11 1/4] dt-bindings: dmaengine: Add doc for tegra gpcdma Message-ID: References: <1635427419-22478-1-git-send-email-akhilrajeev@nvidia.com> <1635427419-22478-2-git-send-email-akhilrajeev@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1635427419-22478-2-git-send-email-akhilrajeev@nvidia.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Oct 28, 2021 at 06:53:36PM +0530, Akhil R wrote: > Add DT binding document for Nvidia Tegra GPCDMA controller. > > Signed-off-by: Rajesh Gumasta > Signed-off-by: Akhil R > Reviewed-by: Jon Hunter > --- > .../bindings/dma/nvidia,tegra186-gpc-dma.yaml | 115 +++++++++++++++++++++ > 1 file changed, 115 insertions(+) > create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml > > diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml > new file mode 100644 > index 0000000..bc97efc > --- /dev/null > +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml > @@ -0,0 +1,115 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dma/nvidia,tegra186-gpc-dma.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NVIDIA Tegra GPC DMA Controller Device Tree Bindings > + > +description: | > + The Tegra General Purpose Central (GPC) DMA controller is used for faster > + data transfers between memory to memory, memory to device and device to > + memory. > + > +maintainers: > + - Jon Hunter > + - Rajesh Gumasta > + > +allOf: > + - $ref: "dma-controller.yaml#" > + > +properties: > + compatible: > + oneOf: > + - enum: > + - nvidia,tegra186-gpcdma > + - nvidia,tegra194-gpcdma > + - items: > + - const: nvidia,tegra186-gpcdma > + - const: nvidia,tegra194-gpcdma One of these is wrong. Either 186 has a fallback to 194 or it doesn't. > + > + "#dma-cells": > + const: 1 > + > + reg: > + maxItems: 1 > + > + interrupts: > + description: | Don't need '|' if there's no formatting. > + Should contain all of the per-channel DMA interrupts in > + ascending order with respect to the DMA channel index. > + minItems: 1 > + maxItems: 32 > + > + resets: > + description: | > + Should contain the reset phandle for gpcdma. Not really a useful description. Drop. > + maxItems: 1 > + > + reset-names: > + const: gpcdma > + > + iommus: > + maxItems: 1 > + > + dma-coherent: true > + > +required: > + - compatible > + - reg > + - interrupts > + - resets > + - reset-names > + - "#dma-cells" > + - iommus > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + #include > + > + dma-controller@2600000 { > + compatible = "nvidia,tegra186-gpcdma"; > + reg = <0x2600000 0x0>; > + resets = <&bpmp TEGRA186_RESET_GPCDMA>; > + reset-names = "gpcdma"; > + interrupts = , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + ; > + #dma-cells = <1>; > + iommus = <&smmu TEGRA186_SID_GPCDMA_0>; > + dma-coherent; > + }; > +... > -- > 2.7.4 > >