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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id r23sm341825ooj.37.2021.11.18.19.28.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Nov 2021 19:28:45 -0800 (PST) Date: Thu, 18 Nov 2021 21:28:40 -0600 From: Bjorn Andersson To: Prasad Malisetty Cc: swboyd@chromium.org, agross@kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, manivannan.sadhasivam@linaro.org, robh+dt@kernel.org, mka@chromium.org, lorenzo.pieralisi@arm.com, svarbanov@mm-sol.com, bhelgaas@google.com Subject: Re: [PATCH v3 1/3] arm64: dts: qcom: sc7280: Fix incorrect clock name Message-ID: References: <1637060508-30375-1-git-send-email-pmaliset@codeaurora.org> <1637060508-30375-2-git-send-email-pmaliset@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1637060508-30375-2-git-send-email-pmaliset@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue 16 Nov 05:01 CST 2021, Prasad Malisetty wrote: > Replace pcie_1_pipe-clk clock name with pcie_1_pipe_clk > To match with dt binding. > > Fixes: ab7772de8612 ("arm64: dts: qcom: SC7280: Add rpmhcc clock controller node") > > Signed-off-by: Prasad Malisetty > Reported-by: kernel test robot This says "lkp reported an issue and this patch fixes that issue", but looking back I think you picked up this tag because lkp had problems building v1 of this patch. I will drop it while applying the patch and I will remove the empty line between Fixes and your S-o-b. Regards, Bjorn > --- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 365a2e0..cb94b87 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -576,7 +576,7 @@ > <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>, > <0>, <0>, <0>, <0>, <0>, <0>; > clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk", > - "pcie_0_pipe_clk", "pcie_1_pipe-clk", > + "pcie_0_pipe_clk", "pcie_1_pipe_clk", > "ufs_phy_rx_symbol_0_clk", "ufs_phy_rx_symbol_1_clk", > "ufs_phy_tx_symbol_0_clk", > "usb3_phy_wrapper_gcc_usb30_pipe_clk"; > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project >