From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5589AC433FE for ; Tue, 23 Nov 2021 09:15:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234644AbhKWJSv (ORCPT ); Tue, 23 Nov 2021 04:18:51 -0500 Received: from muru.com ([72.249.23.125]:59266 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230306AbhKWJSv (ORCPT ); Tue, 23 Nov 2021 04:18:51 -0500 Received: from localhost (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id 7C1DE80F5; Tue, 23 Nov 2021 09:16:21 +0000 (UTC) Date: Tue, 23 Nov 2021 11:15:41 +0200 From: Tony Lindgren To: =?utf-8?B?UmFmYcWCIE1pxYJlY2tp?= Cc: Linus Walleij , Rob Herring , Andy Shevchenko , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Florian Fainelli , bcm-kernel-feedback-list@broadcom.com, =?utf-8?B?UmFmYcWCIE1pxYJlY2tp?= Subject: Re: [PATCH 2/5] dt-bindings: pinctrl: brcm,ns-pinmux: extend example Message-ID: References: <20211118132152.15722-1-zajec5@gmail.com> <20211118132152.15722-3-zajec5@gmail.com> <2fb0593a-208f-a732-843b-b6723633e208@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <2fb0593a-208f-a732-843b-b6723633e208@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org * Rafał Miłecki [211123 07:56]: > Does it mean above "reg" usages are all incorrect and binding "reg" in > such way is deprecated? This is something totally new to me, can you > confirm that, please? Here you have a device with multiple control register instances at various register offsets. Using index here makes as much sense as the old interrupt number defines we used to have but got rid of. Please don't use an index to address them. Index makes sense when there is no real offset to use, like a SPI chip select, or a bit offset inside the register like a GPIO instance bit. Regards, Tony