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From: Rob Herring <robh@kernel.org>
To: Adam Ford <aford173@gmail.com>
Cc: linux-media@vger.kernel.org, cphealy@gmail.com,
	benjamin.gaignard@collabora.com, hverkuil@xs4all.nl,
	Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Lucas Stach <l.stach@pengutronix.de>,
	linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev
Subject: Re: [RFC V2 3/6] dt-bindings: media: nxp,imx8mq-vpu: Update the bindings for G2 support
Date: Tue, 7 Dec 2021 09:14:03 -0600	[thread overview]
Message-ID: <Ya96O6VXuIDdcM8p@robh.at.kernel.org> (raw)
In-Reply-To: <20211207015446.1250854-4-aford173@gmail.com>

On Mon, Dec 06, 2021 at 07:54:42PM -0600, Adam Ford wrote:
> From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> 
> Introducing the G2 hevc video decoder requires modifications of the bindings to allow
> one node per VPU.

Why? It looks like the G2 part was already described. If you are 
changing this because you want 2 drivers for G1 and G2, then NAK. DT 
nodes and drivers don't have to be 1:1. This change is breaking 
compatibility.

> 
> VPUs share one hardware control block which is provided as a phandle on
> a syscon.

That's not really ideal. Is this really a separate block?

> Each node has now one reg and one interrupt.
> Add a compatible for G2 hardware block: nxp,imx8mq-vpu-g2.
> 
> To be compatible with older DT the driver is still capable to use the 'ctrl'
> reg-name even if it is deprecated now.
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> Signed-off-by: Adam Ford <aford173@gmail.com>
> 
> diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> index 762be3f96ce9..eaeba4ce262a 100644
> --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> @@ -15,37 +15,36 @@ description:
>  
>  properties:
>    compatible:
> -    const: nxp,imx8mq-vpu
> +    oneOf:
> +      - const: nxp,imx8mq-vpu-g1
> +      - const: nxp,imx8mq-vpu-g2
>  
>    reg:
> -    maxItems: 3
> -
> -  reg-names:
> -    items:
> -      - const: g1
> -      - const: g2
> -      - const: ctrl
> +    maxItems: 1
>  
>    interrupts:
> -    maxItems: 2
> +    maxItems: 1
>  
>    interrupt-names:
> -    items:
> +    oneOf:
>        - const: g1
>        - const: g2
>  
>    clocks:
> -    maxItems: 3
> +    maxItems: 1
>  
>    clock-names:
> -    items:
> +    oneOf:
>        - const: g1
>        - const: g2
> -      - const: bus
>  
>    power-domains:
>      maxItems: 1
>  
> +  nxp,imx8m-vpu-ctrl:
> +    description: Specifies a phandle to syscon VPU hardware control block
> +    $ref: "/schemas/types.yaml#/definitions/phandle"

This is optional?

> +
>  required:
>    - compatible
>    - reg
> @@ -60,20 +59,27 @@ additionalProperties: false
>  examples:
>    - |
>          #include <dt-bindings/clock/imx8mq-clock.h>
> +        #include <dt-bindings/power/imx8mq-power.h>
>          #include <dt-bindings/interrupt-controller/arm-gic.h>
>  
> -        vpu: video-codec@38300000 {
> +        vpu_g1: video-codec@38300000 {
>                  compatible = "nxp,imx8mq-vpu";
> -                reg = <0x38300000 0x10000>,
> -                      <0x38310000 0x10000>,
> -                      <0x38320000 0x10000>;
> -                reg-names = "g1", "g2", "ctrl";
> -                interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
> -                             <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> -                interrupt-names = "g1", "g2";
> -                clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
> -                         <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
> -                         <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
> -                clock-names = "g1", "g2", "bus";
> -                power-domains = <&pgc_vpu>;
> +                reg = <0x38300000 0x10000>;
> +                reg-names "g1";
> +                interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> +                interrupt-names = "g1";
> +                clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
> +                clock-names = "g1";
> +                power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G1>;
> +        };
> +
> +        vpu_g2: video-codec@38310000 {
> +                compatible = "nxp,imx8mq-vpu-g2";
> +                reg = <0x38300000 0x10000>;
> +                reg-names "g2";
> +                interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> +                interrupt-names = "g2";
> +                clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
> +                clock-names = "g2";
> +                power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
>          };
> -- 
> 2.32.0
> 
> 

  parent reply	other threads:[~2021-12-07 15:14 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-07  1:54 [RFC V2 0/6] media: Hantro: Split iMX8MQ VPU into G1 and G2 with blk-ctrl support Adam Ford
2021-12-07  1:54 ` [RFC V2 1/6] dt-bindings: power: imx8mq: add defines for VPU blk-ctrl domains Adam Ford
2021-12-07  1:54 ` [RFC V2 2/6] dt-bindings: soc: add binding for i.MX8MQ VPU blk-ctrl Adam Ford
2021-12-07  1:54 ` [RFC V2 3/6] dt-bindings: media: nxp,imx8mq-vpu: Update the bindings for G2 support Adam Ford
2021-12-07 14:58   ` Rob Herring
2021-12-07 15:14   ` Rob Herring [this message]
2021-12-07 15:38     ` Lucas Stach
2021-12-07  1:54 ` [RFC V2 4/6] soc: imx: imx8m-blk-ctrl: add i.MX8MQ VPU blk-ctrl Adam Ford
2021-12-07  1:54 ` [RFC V2 5/6] media: hantro: split i.MX8MQ G1 and G2 code Adam Ford
2021-12-07 12:39   ` Ezequiel Garcia
2021-12-07 13:24     ` Adam Ford
2021-12-07 13:41       ` Lucas Stach
2021-12-07 13:50         ` Adam Ford
2021-12-07 13:56           ` Lucas Stach
2021-12-07 14:07             ` Adam Ford
2021-12-07 14:16               ` Lucas Stach
2021-12-07  1:54 ` [RFC V2 6/6] arm64: dts: imx8mq: Split i.MX8MQ G1 and G2 with vpu-blk-ctrl Adam Ford
2021-12-08  9:32 ` [RFC V2 0/6] media: Hantro: Split iMX8MQ VPU into G1 and G2 with blk-ctrl support Benjamin Gaignard
2021-12-08 10:32   ` Lucas Stach
2021-12-08 13:36     ` Benjamin Gaignard
2021-12-08 15:13       ` Adam Ford
2021-12-08 15:39         ` Lucas Stach
2021-12-08 15:57           ` Chris Healy

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