From: Vinod Koul <vkoul@kernel.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Rob Herring <robh+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 0/2] phy: qcom-qmp: Add SM8450 PCIe1 PHY support
Date: Thu, 23 Dec 2021 17:02:53 +0530 [thread overview]
Message-ID: <YcReZWk8DkhFzItD@matsya> (raw)
In-Reply-To: <20211218141754.503661-1-dmitry.baryshkov@linaro.org>
On 18-12-21, 17:17, Dmitry Baryshkov wrote:
> There are two different PCIe PHYs on SM8450, one having one lane (v5)
> and another with two lanes (v5.20). This series adds support for the
> second PCIe phy.
Applied, thanks
--
~Vinod
prev parent reply other threads:[~2021-12-23 11:33 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-18 14:17 [PATCH 0/2] phy: qcom-qmp: Add SM8450 PCIe1 PHY support Dmitry Baryshkov
2021-12-18 14:17 ` [PATCH 1/2] dt-bindings: phy: qcom,qmp: Add SM8450 PCIe PHY bindings Dmitry Baryshkov
2021-12-21 5:23 ` Bjorn Andersson
2021-12-18 14:17 ` [PATCH 2/2] phy: qcom-qmp: Add SM8450 PCIe1 PHY support Dmitry Baryshkov
2021-12-21 5:23 ` Bjorn Andersson
2021-12-23 11:32 ` Vinod Koul [this message]
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