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[66.90.148.213]) by smtp.gmail.com with ESMTPSA id w7sm6948270ott.4.2022.01.19.05.59.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Jan 2022 05:59:04 -0800 (PST) Received: (nullmailer pid 3467736 invoked by uid 1000); Wed, 19 Jan 2022 13:59:03 -0000 Date: Wed, 19 Jan 2022 07:59:03 -0600 From: Rob Herring To: Ansuel Smith Cc: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 01/14] dt-bindings: clock: Document qcom,gcc-ipq8064 binding Message-ID: References: <20220118004434.17095-1-ansuelsmth@gmail.com> <20220118004434.17095-2-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220118004434.17095-2-ansuelsmth@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue, Jan 18, 2022 at 01:44:21AM +0100, Ansuel Smith wrote: > Document qcom,gcc-ipq8064 binding needed to declare pxo and cxo source > clocks. The gcc node is also used by the tsens driver, already Documented, > to get the calib nvmem cells and the base reg from gcc. > > Signed-off-by: Ansuel Smith > --- > .../bindings/clock/qcom,gcc-ipq8064.yaml | 67 +++++++++++++++++++ > 1 file changed, 67 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml > new file mode 100644 > index 000000000000..2dc254fdf161 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml > @@ -0,0 +1,67 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Global Clock & Reset Controller Binding for IPQ8064 > + > +maintainers: > + - Ansuel Smith > + > +description: | > + Qualcomm global clock control module which supports the clocks, resets and > + power domains on IPQ8064. > + > +properties: > + compatible: > + const: qcom,gcc-ipq8064 > + > + '#clock-cells': > + const: 1 > + > + '#reset-cells': > + const: 1 > + > + '#power-domain-cells': > + const: 1 > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: PXO source > + - description: CX0 source > + > + clock-names: > + items: > + - const: pxo > + - const: cxo > + > +required: > + - compatible > + - reg > + - '#clock-cells' > + - '#reset-cells' > + - '#power-domain-cells' > + - clocks > + - clock-names > + > +additionalProperties: true Must be 'false'. True is only for incomplete schemas included by other schemas. > + > +examples: > + - | > + gcc: clock-controller@900000 { > + compatible = "qcom,gcc-ipq8064", "syscon"; > + reg = <0x00900000 0x4000>; > + clocks = <&pxo_board>, <&cxo_board>; > + clock-names = "pxo", "cxo"; > + #clock-cells = <1>; > + #reset-cells = <1>; > + #power-domain-cells = <1>; > + > + /* Tsens node definition */ You need to define child nodes. > + > + }; > +... > -- > 2.33.1 > >