* [PATCH 01/10] arm64: dts: qcom: sm8150: Correct TCS configuration for apps rsc
[not found] <1641749107-31979-1-git-send-email-quic_mkshah@quicinc.com>
@ 2022-01-09 17:24 ` Maulik Shah
2022-01-09 17:24 ` [PATCH 02/10] arm64: dts: qcom: sm8250: Add cpuidle states Maulik Shah
` (4 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Maulik Shah @ 2022-01-09 17:24 UTC (permalink / raw)
To: bjorn.andersson, ulf.hansson
Cc: linux-arm-msm, linux-pm, linux-kernel, rafael, daniel.lezcano,
quic_lsrao, quic_rjendra, Maulik Shah, devicetree
Correct the TCS config by updating the number of TCSes for each type.
Cc: devicetree@vger.kernel.org
Fixes: d8cf9372b654 ("arm64: dts: qcom: sm8150: Add apps shared nodes")
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 6012322..7826564 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3556,9 +3556,9 @@
qcom,tcs-offset = <0xd00>;
qcom,drv-id = <2>;
qcom,tcs-config = <ACTIVE_TCS 2>,
- <SLEEP_TCS 1>,
- <WAKE_TCS 1>,
- <CONTROL_TCS 0>;
+ <SLEEP_TCS 3>,
+ <WAKE_TCS 3>,
+ <CONTROL_TCS 1>;
rpmhcc: clock-controller {
compatible = "qcom,sm8150-rpmh-clk";
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 02/10] arm64: dts: qcom: sm8250: Add cpuidle states
[not found] <1641749107-31979-1-git-send-email-quic_mkshah@quicinc.com>
2022-01-09 17:24 ` [PATCH 01/10] arm64: dts: qcom: sm8150: Correct TCS configuration for apps rsc Maulik Shah
@ 2022-01-09 17:24 ` Maulik Shah
2022-01-14 12:30 ` Ulf Hansson
2022-01-09 17:25 ` [PATCH 03/10] arm64: dts: qcom: sm8350: Correct TCS configuration for apps rsc Maulik Shah
` (3 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Maulik Shah @ 2022-01-09 17:24 UTC (permalink / raw)
To: bjorn.andersson, ulf.hansson
Cc: linux-arm-msm, linux-pm, linux-kernel, rafael, daniel.lezcano,
quic_lsrao, quic_rjendra, Maulik Shah, devicetree
This change adds various idle states and add devices to power domains.
Cc: devicetree@vger.kernel.org
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 105 +++++++++++++++++++++++++++++++++++
1 file changed, 105 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 5617a46..077d0ab 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -98,6 +98,8 @@
capacity-dmips-mhz = <448>;
dynamic-power-coefficient = <205>;
next-level-cache = <&L2_0>;
+ power-domains = <&CPU_PD0>;
+ power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
@@ -120,6 +122,8 @@
capacity-dmips-mhz = <448>;
dynamic-power-coefficient = <205>;
next-level-cache = <&L2_100>;
+ power-domains = <&CPU_PD1>;
+ power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
@@ -139,6 +143,8 @@
capacity-dmips-mhz = <448>;
dynamic-power-coefficient = <205>;
next-level-cache = <&L2_200>;
+ power-domains = <&CPU_PD2>;
+ power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
@@ -158,6 +164,8 @@
capacity-dmips-mhz = <448>;
dynamic-power-coefficient = <205>;
next-level-cache = <&L2_300>;
+ power-domains = <&CPU_PD3>;
+ power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
@@ -177,6 +185,8 @@
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <379>;
next-level-cache = <&L2_400>;
+ power-domains = <&CPU_PD4>;
+ power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
@@ -196,6 +206,8 @@
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <379>;
next-level-cache = <&L2_500>;
+ power-domains = <&CPU_PD5>;
+ power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
@@ -216,6 +228,8 @@
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <379>;
next-level-cache = <&L2_600>;
+ power-domains = <&CPU_PD6>;
+ power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
@@ -235,6 +249,8 @@
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <444>;
next-level-cache = <&L2_700>;
+ power-domains = <&CPU_PD7>;
+ power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 2>;
operating-points-v2 = <&cpu7_opp_table>;
interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
@@ -281,6 +297,42 @@
};
};
};
+
+ idle-states {
+ entry-method = "psci";
+
+ LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
+ compatible = "arm,idle-state";
+ idle-state-name = "silver-rail-power-collapse";
+ arm,psci-suspend-param = <0x40000004>;
+ entry-latency-us = <360>;
+ exit-latency-us = <531>;
+ min-residency-us = <3934>;
+ local-timer-stop;
+ };
+
+ BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
+ compatible = "arm,idle-state";
+ idle-state-name = "gold-rail-power-collapse";
+ arm,psci-suspend-param = <0x40000004>;
+ entry-latency-us = <702>;
+ exit-latency-us = <1061>;
+ min-residency-us = <4488>;
+ local-timer-stop;
+ };
+ };
+
+ domain-idle-states {
+ CLUSTER_SLEEP_0: cluster-sleep-0 {
+ compatible = "domain-idle-state";
+ idle-state-name = "cluster-llcc-off";
+ arm,psci-suspend-param = <0x4100c244>;
+ entry-latency-us = <3264>;
+ exit-latency-us = <6562>;
+ min-residency-us = <9987>;
+ local-timer-stop;
+ };
+ };
};
cpu0_opp_table: cpu0_opp_table {
@@ -594,6 +646,59 @@
psci {
compatible = "arm,psci-1.0";
method = "smc";
+
+ CPU_PD0: cpu0 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+ };
+
+ CPU_PD1: cpu1 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+ };
+
+ CPU_PD2: cpu2 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+ };
+
+ CPU_PD3: cpu3 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+ };
+
+ CPU_PD4: cpu4 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&BIG_CPU_SLEEP_0>;
+ };
+
+ CPU_PD5: cpu5 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&BIG_CPU_SLEEP_0>;
+ };
+
+ CPU_PD6: cpu6 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&BIG_CPU_SLEEP_0>;
+ };
+
+ CPU_PD7: cpu7 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&BIG_CPU_SLEEP_0>;
+ };
+
+ CLUSTER_PD: cpu-cluster0 {
+ #power-domain-cells = <0>;
+ domain-idle-states = <&CLUSTER_SLEEP_0>;
+ };
};
reserved-memory {
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 03/10] arm64: dts: qcom: sm8350: Correct TCS configuration for apps rsc
[not found] <1641749107-31979-1-git-send-email-quic_mkshah@quicinc.com>
2022-01-09 17:24 ` [PATCH 01/10] arm64: dts: qcom: sm8150: Correct TCS configuration for apps rsc Maulik Shah
2022-01-09 17:24 ` [PATCH 02/10] arm64: dts: qcom: sm8250: Add cpuidle states Maulik Shah
@ 2022-01-09 17:25 ` Maulik Shah
2022-01-09 17:25 ` [PATCH 04/10] arm64: dts: qcom: sm8450: Update cpuidle states parameters Maulik Shah
` (2 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Maulik Shah @ 2022-01-09 17:25 UTC (permalink / raw)
To: bjorn.andersson, ulf.hansson
Cc: linux-arm-msm, linux-pm, linux-kernel, rafael, daniel.lezcano,
quic_lsrao, quic_rjendra, Maulik Shah, devicetree
Correct the TCS config by updating the number of TCSes for each type.
Cc: devicetree@vger.kernel.org
Fixes: b7e8f433a673 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC")
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 53b39e7..665f79f 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1802,7 +1802,7 @@
qcom,tcs-offset = <0xd00>;
qcom,drv-id = <2>;
qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>,
- <WAKE_TCS 3>, <CONTROL_TCS 1>;
+ <WAKE_TCS 3>, <CONTROL_TCS 0>;
rpmhcc: clock-controller {
compatible = "qcom,sm8350-rpmh-clk";
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 04/10] arm64: dts: qcom: sm8450: Update cpuidle states parameters
[not found] <1641749107-31979-1-git-send-email-quic_mkshah@quicinc.com>
` (2 preceding siblings ...)
2022-01-09 17:25 ` [PATCH 03/10] arm64: dts: qcom: sm8350: Correct TCS configuration for apps rsc Maulik Shah
@ 2022-01-09 17:25 ` Maulik Shah
2022-01-14 12:30 ` Ulf Hansson
2022-01-09 17:25 ` [PATCH 05/10] dt-bindings: soc: qcom: Update devicetree binding document for rpmh-rsc Maulik Shah
2022-01-09 17:25 ` [PATCH 07/10] arm64: dts: qcom: Add power-domains property for apps_rsc Maulik Shah
5 siblings, 1 reply; 12+ messages in thread
From: Maulik Shah @ 2022-01-09 17:25 UTC (permalink / raw)
To: bjorn.andersson, ulf.hansson
Cc: linux-arm-msm, linux-pm, linux-kernel, rafael, daniel.lezcano,
quic_lsrao, quic_rjendra, Maulik Shah, devicetree
This change updates/corrects below cpuidle parameters
1. entry-latency, exit-latency and residency for various idle states.
2. arm,psci-suspend-param which is same for CLUSTER_SLEEP_0/1 states.
3. Add CLUSTER_SLEEP_1 in CLUSTER_PD.
Cc: devicetree@vger.kernel.org
Fixes: 5188049c9b36 ("arm64: dts: qcom: Add base SM8450 DTSI")
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 10c25ad..5e329f8 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -203,9 +203,9 @@
compatible = "arm,idle-state";
idle-state-name = "silver-rail-power-collapse";
arm,psci-suspend-param = <0x40000004>;
- entry-latency-us = <274>;
- exit-latency-us = <480>;
- min-residency-us = <3934>;
+ entry-latency-us = <800>;
+ exit-latency-us = <750>;
+ min-residency-us = <4090>;
local-timer-stop;
};
@@ -213,9 +213,9 @@
compatible = "arm,idle-state";
idle-state-name = "gold-rail-power-collapse";
arm,psci-suspend-param = <0x40000004>;
- entry-latency-us = <327>;
- exit-latency-us = <1502>;
- min-residency-us = <4488>;
+ entry-latency-us = <600>;
+ exit-latency-us = <1550>;
+ min-residency-us = <4791>;
local-timer-stop;
};
};
@@ -224,10 +224,10 @@
CLUSTER_SLEEP_0: cluster-sleep-0 {
compatible = "domain-idle-state";
idle-state-name = "cluster-l3-off";
- arm,psci-suspend-param = <0x4100c344>;
- entry-latency-us = <584>;
- exit-latency-us = <2332>;
- min-residency-us = <6118>;
+ arm,psci-suspend-param = <0x41000044>;
+ entry-latency-us = <1050>;
+ exit-latency-us = <2500>;
+ min-residency-us = <5309>;
local-timer-stop;
};
@@ -235,9 +235,9 @@
compatible = "domain-idle-state";
idle-state-name = "cluster-power-collapse";
arm,psci-suspend-param = <0x4100c344>;
- entry-latency-us = <2893>;
- exit-latency-us = <4023>;
- min-residency-us = <9987>;
+ entry-latency-us = <2700>;
+ exit-latency-us = <3500>;
+ min-residency-us = <13959>;
local-timer-stop;
};
};
@@ -315,7 +315,7 @@
CLUSTER_PD: cpu-cluster0 {
#power-domain-cells = <0>;
- domain-idle-states = <&CLUSTER_SLEEP_0>;
+ domain-idle-states = <&CLUSTER_SLEEP_0 &CLUSTER_SLEEP_1>;
};
};
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 05/10] dt-bindings: soc: qcom: Update devicetree binding document for rpmh-rsc
[not found] <1641749107-31979-1-git-send-email-quic_mkshah@quicinc.com>
` (3 preceding siblings ...)
2022-01-09 17:25 ` [PATCH 04/10] arm64: dts: qcom: sm8450: Update cpuidle states parameters Maulik Shah
@ 2022-01-09 17:25 ` Maulik Shah
2022-01-14 12:31 ` Ulf Hansson
2022-01-21 23:06 ` Rob Herring
2022-01-09 17:25 ` [PATCH 07/10] arm64: dts: qcom: Add power-domains property for apps_rsc Maulik Shah
5 siblings, 2 replies; 12+ messages in thread
From: Maulik Shah @ 2022-01-09 17:25 UTC (permalink / raw)
To: bjorn.andersson, ulf.hansson
Cc: linux-arm-msm, linux-pm, linux-kernel, rafael, daniel.lezcano,
quic_lsrao, quic_rjendra, Maulik Shah, devicetree
The change documents power-domains property for RSC device.
This optional property points to corresponding PM domain node.
Cc: devicetree@vger.kernel.org
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
---
Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt b/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt
index 9b86d1e..85b9859 100644
--- a/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt
@@ -78,6 +78,11 @@ Properties:
CONTROL_TCS
- Cell #2 (Number of TCS): <u32>
+- power-domains:
+ Usage: optional
+ Value type: <prop-encoded-power-domains>
+ Definition: Phandle pointing to the corresponding PM domain node.
+
- label:
Usage: optional
Value type: <string>
@@ -112,6 +117,7 @@ TCS-OFFSET: 0xD00
<SLEEP_TCS 3>,
<WAKE_TCS 3>,
<CONTROL_TCS 1>;
+ power-domains = <&CLUSTER_PD>;
};
Example 2:
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 07/10] arm64: dts: qcom: Add power-domains property for apps_rsc
[not found] <1641749107-31979-1-git-send-email-quic_mkshah@quicinc.com>
` (4 preceding siblings ...)
2022-01-09 17:25 ` [PATCH 05/10] dt-bindings: soc: qcom: Update devicetree binding document for rpmh-rsc Maulik Shah
@ 2022-01-09 17:25 ` Maulik Shah
2022-01-14 12:33 ` Ulf Hansson
5 siblings, 1 reply; 12+ messages in thread
From: Maulik Shah @ 2022-01-09 17:25 UTC (permalink / raw)
To: bjorn.andersson, ulf.hansson
Cc: linux-arm-msm, linux-pm, linux-kernel, rafael, daniel.lezcano,
quic_lsrao, quic_rjendra, Maulik Shah, devicetree
Add power-domains property which allows apps_rsc device to attach
to cluster power domain on sm8150, sm8250, sm8350 and sm8450.
Cc: devicetree@vger.kernel.org
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 1 +
arch/arm64/boot/dts/qcom/sm8250.dtsi | 1 +
arch/arm64/boot/dts/qcom/sm8350.dtsi | 1 +
arch/arm64/boot/dts/qcom/sm8450.dtsi | 1 +
4 files changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 7826564..83a44f5 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3559,6 +3559,7 @@
<SLEEP_TCS 3>,
<WAKE_TCS 3>,
<CONTROL_TCS 1>;
+ power-domains = <&CLUSTER_PD>;
rpmhcc: clock-controller {
compatible = "qcom,sm8150-rpmh-clk";
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 077d0ab..ebb4a4e 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -4593,6 +4593,7 @@
qcom,drv-id = <2>;
qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>,
<WAKE_TCS 3>, <CONTROL_TCS 1>;
+ power-domains = <&CLUSTER_PD>;
rpmhcc: clock-controller {
compatible = "qcom,sm8250-rpmh-clk";
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 665f79f..2c5dc305 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1803,6 +1803,7 @@
qcom,drv-id = <2>;
qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>,
<WAKE_TCS 3>, <CONTROL_TCS 0>;
+ power-domains = <&CLUSTER_PD>;
rpmhcc: clock-controller {
compatible = "qcom,sm8350-rpmh-clk";
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 5e329f8..acd122a 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -910,6 +910,7 @@
qcom,drv-id = <2>;
qcom,tcs-config = <ACTIVE_TCS 3>, <SLEEP_TCS 2>,
<WAKE_TCS 2>, <CONTROL_TCS 0>;
+ power-domains = <&CLUSTER_PD>;
apps_bcm_voter: bcm-voter {
compatible = "qcom,bcm-voter";
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 02/10] arm64: dts: qcom: sm8250: Add cpuidle states
2022-01-09 17:24 ` [PATCH 02/10] arm64: dts: qcom: sm8250: Add cpuidle states Maulik Shah
@ 2022-01-14 12:30 ` Ulf Hansson
0 siblings, 0 replies; 12+ messages in thread
From: Ulf Hansson @ 2022-01-14 12:30 UTC (permalink / raw)
To: Maulik Shah
Cc: bjorn.andersson, linux-arm-msm, linux-pm, linux-kernel, rafael,
daniel.lezcano, quic_lsrao, quic_rjendra, devicetree
On Sun, 9 Jan 2022 at 18:25, Maulik Shah <quic_mkshah@quicinc.com> wrote:
>
> This change adds various idle states and add devices to power domains.
>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Kind regards
Uffe
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 105 +++++++++++++++++++++++++++++++++++
> 1 file changed, 105 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 5617a46..077d0ab 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -98,6 +98,8 @@
> capacity-dmips-mhz = <448>;
> dynamic-power-coefficient = <205>;
> next-level-cache = <&L2_0>;
> + power-domains = <&CPU_PD0>;
> + power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> @@ -120,6 +122,8 @@
> capacity-dmips-mhz = <448>;
> dynamic-power-coefficient = <205>;
> next-level-cache = <&L2_100>;
> + power-domains = <&CPU_PD1>;
> + power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> @@ -139,6 +143,8 @@
> capacity-dmips-mhz = <448>;
> dynamic-power-coefficient = <205>;
> next-level-cache = <&L2_200>;
> + power-domains = <&CPU_PD2>;
> + power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> @@ -158,6 +164,8 @@
> capacity-dmips-mhz = <448>;
> dynamic-power-coefficient = <205>;
> next-level-cache = <&L2_300>;
> + power-domains = <&CPU_PD3>;
> + power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> @@ -177,6 +185,8 @@
> capacity-dmips-mhz = <1024>;
> dynamic-power-coefficient = <379>;
> next-level-cache = <&L2_400>;
> + power-domains = <&CPU_PD4>;
> + power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> @@ -196,6 +206,8 @@
> capacity-dmips-mhz = <1024>;
> dynamic-power-coefficient = <379>;
> next-level-cache = <&L2_500>;
> + power-domains = <&CPU_PD5>;
> + power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> @@ -216,6 +228,8 @@
> capacity-dmips-mhz = <1024>;
> dynamic-power-coefficient = <379>;
> next-level-cache = <&L2_600>;
> + power-domains = <&CPU_PD6>;
> + power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> @@ -235,6 +249,8 @@
> capacity-dmips-mhz = <1024>;
> dynamic-power-coefficient = <444>;
> next-level-cache = <&L2_700>;
> + power-domains = <&CPU_PD7>;
> + power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 2>;
> operating-points-v2 = <&cpu7_opp_table>;
> interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> @@ -281,6 +297,42 @@
> };
> };
> };
> +
> + idle-states {
> + entry-method = "psci";
> +
> + LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
> + compatible = "arm,idle-state";
> + idle-state-name = "silver-rail-power-collapse";
> + arm,psci-suspend-param = <0x40000004>;
> + entry-latency-us = <360>;
> + exit-latency-us = <531>;
> + min-residency-us = <3934>;
> + local-timer-stop;
> + };
> +
> + BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
> + compatible = "arm,idle-state";
> + idle-state-name = "gold-rail-power-collapse";
> + arm,psci-suspend-param = <0x40000004>;
> + entry-latency-us = <702>;
> + exit-latency-us = <1061>;
> + min-residency-us = <4488>;
> + local-timer-stop;
> + };
> + };
> +
> + domain-idle-states {
> + CLUSTER_SLEEP_0: cluster-sleep-0 {
> + compatible = "domain-idle-state";
> + idle-state-name = "cluster-llcc-off";
> + arm,psci-suspend-param = <0x4100c244>;
> + entry-latency-us = <3264>;
> + exit-latency-us = <6562>;
> + min-residency-us = <9987>;
> + local-timer-stop;
> + };
> + };
> };
>
> cpu0_opp_table: cpu0_opp_table {
> @@ -594,6 +646,59 @@
> psci {
> compatible = "arm,psci-1.0";
> method = "smc";
> +
> + CPU_PD0: cpu0 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
> + };
> +
> + CPU_PD1: cpu1 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
> + };
> +
> + CPU_PD2: cpu2 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
> + };
> +
> + CPU_PD3: cpu3 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
> + };
> +
> + CPU_PD4: cpu4 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + domain-idle-states = <&BIG_CPU_SLEEP_0>;
> + };
> +
> + CPU_PD5: cpu5 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + domain-idle-states = <&BIG_CPU_SLEEP_0>;
> + };
> +
> + CPU_PD6: cpu6 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + domain-idle-states = <&BIG_CPU_SLEEP_0>;
> + };
> +
> + CPU_PD7: cpu7 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + domain-idle-states = <&BIG_CPU_SLEEP_0>;
> + };
> +
> + CLUSTER_PD: cpu-cluster0 {
> + #power-domain-cells = <0>;
> + domain-idle-states = <&CLUSTER_SLEEP_0>;
> + };
> };
>
> reserved-memory {
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 04/10] arm64: dts: qcom: sm8450: Update cpuidle states parameters
2022-01-09 17:25 ` [PATCH 04/10] arm64: dts: qcom: sm8450: Update cpuidle states parameters Maulik Shah
@ 2022-01-14 12:30 ` Ulf Hansson
2022-01-17 8:12 ` Maulik Shah
0 siblings, 1 reply; 12+ messages in thread
From: Ulf Hansson @ 2022-01-14 12:30 UTC (permalink / raw)
To: Maulik Shah
Cc: bjorn.andersson, linux-arm-msm, linux-pm, linux-kernel, rafael,
daniel.lezcano, quic_lsrao, quic_rjendra, devicetree
On Sun, 9 Jan 2022 at 18:25, Maulik Shah <quic_mkshah@quicinc.com> wrote:
>
> This change updates/corrects below cpuidle parameters
>
> 1. entry-latency, exit-latency and residency for various idle states.
> 2. arm,psci-suspend-param which is same for CLUSTER_SLEEP_0/1 states.
> 3. Add CLUSTER_SLEEP_1 in CLUSTER_PD.
>
> Cc: devicetree@vger.kernel.org
> Fixes: 5188049c9b36 ("arm64: dts: qcom: Add base SM8450 DTSI")
> Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 28 ++++++++++++++--------------
> 1 file changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 10c25ad..5e329f8 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -203,9 +203,9 @@
> compatible = "arm,idle-state";
> idle-state-name = "silver-rail-power-collapse";
> arm,psci-suspend-param = <0x40000004>;
> - entry-latency-us = <274>;
> - exit-latency-us = <480>;
> - min-residency-us = <3934>;
> + entry-latency-us = <800>;
> + exit-latency-us = <750>;
> + min-residency-us = <4090>;
> local-timer-stop;
> };
>
> @@ -213,9 +213,9 @@
> compatible = "arm,idle-state";
> idle-state-name = "gold-rail-power-collapse";
> arm,psci-suspend-param = <0x40000004>;
> - entry-latency-us = <327>;
> - exit-latency-us = <1502>;
> - min-residency-us = <4488>;
> + entry-latency-us = <600>;
> + exit-latency-us = <1550>;
> + min-residency-us = <4791>;
> local-timer-stop;
> };
> };
> @@ -224,10 +224,10 @@
> CLUSTER_SLEEP_0: cluster-sleep-0 {
> compatible = "domain-idle-state";
> idle-state-name = "cluster-l3-off";
> - arm,psci-suspend-param = <0x4100c344>;
> - entry-latency-us = <584>;
> - exit-latency-us = <2332>;
> - min-residency-us = <6118>;
> + arm,psci-suspend-param = <0x41000044>;
> + entry-latency-us = <1050>;
> + exit-latency-us = <2500>;
> + min-residency-us = <5309>;
> local-timer-stop;
> };
>
> @@ -235,9 +235,9 @@
> compatible = "domain-idle-state";
> idle-state-name = "cluster-power-collapse";
> arm,psci-suspend-param = <0x4100c344>;
> - entry-latency-us = <2893>;
> - exit-latency-us = <4023>;
> - min-residency-us = <9987>;
> + entry-latency-us = <2700>;
> + exit-latency-us = <3500>;
> + min-residency-us = <13959>;
> local-timer-stop;
> };
> };
> @@ -315,7 +315,7 @@
>
> CLUSTER_PD: cpu-cluster0 {
> #power-domain-cells = <0>;
> - domain-idle-states = <&CLUSTER_SLEEP_0>;
> + domain-idle-states = <&CLUSTER_SLEEP_0 &CLUSTER_SLEEP_1>;
Should this be like the below instead?
<&CLUSTER_SLEEP_0>, <&CLUSTER_SLEEP_1>;
> };
> };
>
> --
> 2.7.4
>
Other than the above, feel free to add:
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Kind regards
Uffe
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 05/10] dt-bindings: soc: qcom: Update devicetree binding document for rpmh-rsc
2022-01-09 17:25 ` [PATCH 05/10] dt-bindings: soc: qcom: Update devicetree binding document for rpmh-rsc Maulik Shah
@ 2022-01-14 12:31 ` Ulf Hansson
2022-01-21 23:06 ` Rob Herring
1 sibling, 0 replies; 12+ messages in thread
From: Ulf Hansson @ 2022-01-14 12:31 UTC (permalink / raw)
To: Maulik Shah
Cc: bjorn.andersson, linux-arm-msm, linux-pm, linux-kernel, rafael,
daniel.lezcano, quic_lsrao, quic_rjendra, devicetree
On Sun, 9 Jan 2022 at 18:25, Maulik Shah <quic_mkshah@quicinc.com> wrote:
>
> The change documents power-domains property for RSC device.
> This optional property points to corresponding PM domain node.
>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
BTW, it would be nice to get the binding converted to the new DT yaml
formal, perhaps something we can look at doing on top?
Kind regards
Uffe
> ---
> Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt b/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt
> index 9b86d1e..85b9859 100644
> --- a/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt
> +++ b/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt
> @@ -78,6 +78,11 @@ Properties:
> CONTROL_TCS
> - Cell #2 (Number of TCS): <u32>
>
> +- power-domains:
> + Usage: optional
> + Value type: <prop-encoded-power-domains>
> + Definition: Phandle pointing to the corresponding PM domain node.
> +
> - label:
> Usage: optional
> Value type: <string>
> @@ -112,6 +117,7 @@ TCS-OFFSET: 0xD00
> <SLEEP_TCS 3>,
> <WAKE_TCS 3>,
> <CONTROL_TCS 1>;
> + power-domains = <&CLUSTER_PD>;
> };
>
> Example 2:
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 07/10] arm64: dts: qcom: Add power-domains property for apps_rsc
2022-01-09 17:25 ` [PATCH 07/10] arm64: dts: qcom: Add power-domains property for apps_rsc Maulik Shah
@ 2022-01-14 12:33 ` Ulf Hansson
0 siblings, 0 replies; 12+ messages in thread
From: Ulf Hansson @ 2022-01-14 12:33 UTC (permalink / raw)
To: Maulik Shah
Cc: bjorn.andersson, linux-arm-msm, linux-pm, linux-kernel, rafael,
daniel.lezcano, quic_lsrao, quic_rjendra, devicetree
On Sun, 9 Jan 2022 at 18:26, Maulik Shah <quic_mkshah@quicinc.com> wrote:
>
> Add power-domains property which allows apps_rsc device to attach
> to cluster power domain on sm8150, sm8250, sm8350 and sm8450.
>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Kind regards
Uffe
> ---
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 1 +
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 1 +
> arch/arm64/boot/dts/qcom/sm8350.dtsi | 1 +
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 1 +
> 4 files changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 7826564..83a44f5 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -3559,6 +3559,7 @@
> <SLEEP_TCS 3>,
> <WAKE_TCS 3>,
> <CONTROL_TCS 1>;
> + power-domains = <&CLUSTER_PD>;
>
> rpmhcc: clock-controller {
> compatible = "qcom,sm8150-rpmh-clk";
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 077d0ab..ebb4a4e 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -4593,6 +4593,7 @@
> qcom,drv-id = <2>;
> qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>,
> <WAKE_TCS 3>, <CONTROL_TCS 1>;
> + power-domains = <&CLUSTER_PD>;
>
> rpmhcc: clock-controller {
> compatible = "qcom,sm8250-rpmh-clk";
> diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> index 665f79f..2c5dc305 100644
> --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> @@ -1803,6 +1803,7 @@
> qcom,drv-id = <2>;
> qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>,
> <WAKE_TCS 3>, <CONTROL_TCS 0>;
> + power-domains = <&CLUSTER_PD>;
>
> rpmhcc: clock-controller {
> compatible = "qcom,sm8350-rpmh-clk";
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 5e329f8..acd122a 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -910,6 +910,7 @@
> qcom,drv-id = <2>;
> qcom,tcs-config = <ACTIVE_TCS 3>, <SLEEP_TCS 2>,
> <WAKE_TCS 2>, <CONTROL_TCS 0>;
> + power-domains = <&CLUSTER_PD>;
>
> apps_bcm_voter: bcm-voter {
> compatible = "qcom,bcm-voter";
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 04/10] arm64: dts: qcom: sm8450: Update cpuidle states parameters
2022-01-14 12:30 ` Ulf Hansson
@ 2022-01-17 8:12 ` Maulik Shah
0 siblings, 0 replies; 12+ messages in thread
From: Maulik Shah @ 2022-01-17 8:12 UTC (permalink / raw)
To: Ulf Hansson
Cc: bjorn.andersson, linux-arm-msm, linux-pm, linux-kernel, rafael,
daniel.lezcano, quic_lsrao, quic_rjendra, devicetree
Hi,
On 1/14/2022 6:00 PM, Ulf Hansson wrote:
>
>> @@ -315,7 +315,7 @@
>>
>> CLUSTER_PD: cpu-cluster0 {
>> #power-domain-cells = <0>;
>> - domain-idle-states = <&CLUSTER_SLEEP_0>;
>> + domain-idle-states = <&CLUSTER_SLEEP_0 &CLUSTER_SLEEP_1>;
> Should this be like the below instead?
>
> <&CLUSTER_SLEEP_0>, <&CLUSTER_SLEEP_1>;
Thanks for catching this. Will correct in v2.
Thanks,
Maulik
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 05/10] dt-bindings: soc: qcom: Update devicetree binding document for rpmh-rsc
2022-01-09 17:25 ` [PATCH 05/10] dt-bindings: soc: qcom: Update devicetree binding document for rpmh-rsc Maulik Shah
2022-01-14 12:31 ` Ulf Hansson
@ 2022-01-21 23:06 ` Rob Herring
1 sibling, 0 replies; 12+ messages in thread
From: Rob Herring @ 2022-01-21 23:06 UTC (permalink / raw)
To: Maulik Shah
Cc: quic_lsrao, linux-arm-msm, linux-pm, daniel.lezcano, ulf.hansson,
quic_rjendra, devicetree, rafael, linux-kernel, bjorn.andersson
On Sun, 09 Jan 2022 22:55:02 +0530, Maulik Shah wrote:
> The change documents power-domains property for RSC device.
> This optional property points to corresponding PM domain node.
>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
> ---
> Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt | 6 ++++++
> 1 file changed, 6 insertions(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2022-01-21 23:06 UTC | newest]
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2022-01-09 17:24 ` [PATCH 01/10] arm64: dts: qcom: sm8150: Correct TCS configuration for apps rsc Maulik Shah
2022-01-09 17:24 ` [PATCH 02/10] arm64: dts: qcom: sm8250: Add cpuidle states Maulik Shah
2022-01-14 12:30 ` Ulf Hansson
2022-01-09 17:25 ` [PATCH 03/10] arm64: dts: qcom: sm8350: Correct TCS configuration for apps rsc Maulik Shah
2022-01-09 17:25 ` [PATCH 04/10] arm64: dts: qcom: sm8450: Update cpuidle states parameters Maulik Shah
2022-01-14 12:30 ` Ulf Hansson
2022-01-17 8:12 ` Maulik Shah
2022-01-09 17:25 ` [PATCH 05/10] dt-bindings: soc: qcom: Update devicetree binding document for rpmh-rsc Maulik Shah
2022-01-14 12:31 ` Ulf Hansson
2022-01-21 23:06 ` Rob Herring
2022-01-09 17:25 ` [PATCH 07/10] arm64: dts: qcom: Add power-domains property for apps_rsc Maulik Shah
2022-01-14 12:33 ` Ulf Hansson
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